/hal_stm32-3.7.0/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_hal_fdcan.c | 4980 MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TBSA, (StartAddress << FDCAN_TXBC_TBSA_Pos)); in FDCAN_CalcultateRamBlockAddresses()
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/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_fdcan.c | 6138 MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TBSA, (StartAddress << FDCAN_TXBC_TBSA_Pos)); in FDCAN_CalcultateRamBlockAddresses()
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/hal_stm32-3.7.0/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xx.h | 4747 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4748 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h7a3xxq.h | 4748 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4749 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h7b0xx.h | 4882 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4883 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h7b0xxq.h | 4883 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4884 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h7b3xx.h | 4882 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4883 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h7b3xxq.h | 4883 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4884 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h723xx.h | 4981 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4982 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h725xx.h | 4982 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4983 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h730xxq.h | 5117 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5118 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h730xx.h | 5116 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5117 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h742xx.h | 4769 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4770 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h733xx.h | 5116 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5117 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h735xx.h | 5117 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5118 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h750xx.h | 4940 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4941 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h753xx.h | 4940 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4941 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h755xx.h | 5047 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5048 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h745xx.h | 4971 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4972 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h745xg.h | 4971 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4972 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h743xx.h | 4864 #define FDCAN_TXBC_TBSA_Pos (2U) macro 4865 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h747xx.h | 5054 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5055 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h747xg.h | 5054 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5055 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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D | stm32h757xx.h | 5130 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5131 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x0000FFFC */
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/hal_stm32-3.7.0/stm32cube/stm32mp1xx/soc/ |
D | stm32mp153dxx_ca7.h | 5937 #define FDCAN_TXBC_TBSA_Pos (2U) macro 5938 #define FDCAN_TXBC_TBSA_Msk (0x3FFFUL << FDCAN_TXBC_TBSA_Pos) /*!< 0x000000FC */
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