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Searched refs:DMA_CTR1_SBL_1 (Results 1 – 25 of 38) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h1442 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2074 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SBL_1, in LL_DMA_SetSrcBurstLength()
2075 ((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1); in LL_DMA_SetSrcBurstLength()
2098 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U); in LL_DMA_GetSrcBurstLength()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h2080 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2712 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SBL_1, in LL_DMA_SetSrcBurstLength()
2713 ((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1); in LL_DMA_SetSrcBurstLength()
2736 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U); in LL_DMA_GetSrcBurstLength()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h1972 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2650 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SBL_1, in LL_DMA_SetSrcBurstLength()
2651 ((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1); in LL_DMA_SetSrcBurstLength()
2682 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U); in LL_DMA_GetSrcBurstLength()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h2005 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2857 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SBL_1, in LL_DMA_SetSrcBurstLength()
2858 ((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1); in LL_DMA_SetSrcBurstLength()
2890 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U); in LL_DMA_GetSrcBurstLength()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dma.c1681 (((hdma->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_Init()
Dstm32h7rsxx_hal_dma_ex.c3711 (((pNodeConfig->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_List_BuildNode()
3914 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c1616 (((hdma->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_Init()
Dstm32wbaxx_hal_dma_ex.c3550 (((pNodeConfig->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_List_BuildNode()
3637 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c1631 (((hdma->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_Init()
Dstm32h5xx_hal_dma_ex.c3744 (((pNodeConfig->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_List_BuildNode()
3947 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma.c1620 (((hdma->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_Init()
Dstm32u5xx_hal_dma_ex.c3745 (((pNodeConfig->Init.SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1)); in DMA_List_BuildNode()
3945 DMA_CTR1_SBL_1) >> DMA_CTR1_SBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2264 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32wba52xx.h2848 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32wba54xx.h3031 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32wba55xx.h3031 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3872 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32h523xx.h5230 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32h562xx.h5651 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32h533xx.h5638 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5024 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32h7s3xx.h5469 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h5914 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32u545xx.h6314 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro
Dstm32u575xx.h6312 #define DMA_CTR1_SBL_1 DMA_CTR1_SBL_1_Msk /*!< Source bur… macro

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