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Searched refs:DMA_CTR1_PAM_0 (Results 1 – 25 of 34) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_dma_ex.h183 #define DMA_DATA_RIGHTALIGN_SIGNEXT DMA_CTR1_PAM_0 /*!< If source data width < destination data …
186 #define DMA_DATA_LEFTALIGN_RIGHTTRUNC DMA_CTR1_PAM_0 /*!< If source data width > destination data …
Dstm32wbaxx_ll_dma.h610 #define LL_DMA_DATA_ALIGN_SIGNEXTPADD DMA_CTR1_PAM_0 /*!< If src data width < dest data width :
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_dma_ex.h231 #define DMA_DATA_RIGHTALIGN_SIGNEXT DMA_CTR1_PAM_0 /*!< If source data width < destination data …
234 #define DMA_DATA_LEFTALIGN_RIGHTTRUNC DMA_CTR1_PAM_0 /*!< If source data width > destination data …
Dstm32h5xx_ll_dma.h738 #define LL_DMA_DATA_ALIGN_SIGNEXTPADD DMA_CTR1_PAM_0 /*!< If src data width < dest data width :
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_dma_ex.h226 #define DMA_DATA_RIGHTALIGN_SIGNEXT DMA_CTR1_PAM_0 /*!< If source data width < destination data …
229 #define DMA_DATA_LEFTALIGN_RIGHTTRUNC DMA_CTR1_PAM_0 /*!< If source data width > destination data …
Dstm32h7rsxx_ll_dma.h758 #define LL_DMA_DATA_ALIGN_SIGNEXTPADD DMA_CTR1_PAM_0 /*!< If src data width < dest data width :
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_dma_ex.h231 #define DMA_DATA_RIGHTALIGN_SIGNEXT DMA_CTR1_PAM_0 /*!< If source data width < destination data …
234 #define DMA_DATA_LEFTALIGN_RIGHTTRUNC DMA_CTR1_PAM_0 /*!< If source data width > destination data …
Dstm32u5xx_ll_dma.h755 #define LL_DMA_DATA_ALIGN_SIGNEXTPADD DMA_CTR1_PAM_0 /*!< If src data width < dest data width :
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2268 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32wba52xx.h2852 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32wba54xx.h3035 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32wba55xx.h3035 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3876 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h523xx.h5234 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h562xx.h5655 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h533xx.h5642 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h563xx.h7739 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h573xx.h8147 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5028 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h7s3xx.h5473 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h7s7xx.h5552 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32h7r7xx.h5105 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h5918 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32u545xx.h6318 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro
Dstm32u575xx.h6316 #define DMA_CTR1_PAM_0 (0x1UL << DMA_CTR1_PAM_Pos) /*!< Bit 0 */ macro

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