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Searched refs:DMA_CLLR_UDA_Pos (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2357 #define DMA_CLLR_UDA_Pos (27U) macro
2358 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32wba52xx.h2941 #define DMA_CLLR_UDA_Pos (27U) macro
2942 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32wba54xx.h3124 #define DMA_CLLR_UDA_Pos (27U) macro
3125 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32wba55xx.h3124 #define DMA_CLLR_UDA_Pos (27U) macro
3125 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3999 #define DMA_CLLR_UDA_Pos (27U) macro
4000 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h523xx.h5363 #define DMA_CLLR_UDA_Pos (27U) macro
5364 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h562xx.h5784 #define DMA_CLLR_UDA_Pos (27U) macro
5785 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h533xx.h5771 #define DMA_CLLR_UDA_Pos (27U) macro
5772 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h563xx.h7868 #define DMA_CLLR_UDA_Pos (27U) macro
7869 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h573xx.h8276 #define DMA_CLLR_UDA_Pos (27U) macro
8277 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5154 #define DMA_CLLR_UDA_Pos (27U) macro
5155 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h7s3xx.h5599 #define DMA_CLLR_UDA_Pos (27U) macro
5600 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h7s7xx.h5678 #define DMA_CLLR_UDA_Pos (27U) macro
5679 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32h7r7xx.h5231 #define DMA_CLLR_UDA_Pos (27U) macro
5232 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h6044 #define DMA_CLLR_UDA_Pos (27U) macro
6045 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u545xx.h6444 #define DMA_CLLR_UDA_Pos (27U) macro
6445 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u575xx.h6442 #define DMA_CLLR_UDA_Pos (27U) macro
6443 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u585xx.h6891 #define DMA_CLLR_UDA_Pos (27U) macro
6892 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u5f7xx.h6994 #define DMA_CLLR_UDA_Pos (27U) macro
6995 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u595xx.h6698 #define DMA_CLLR_UDA_Pos (27U) macro
6699 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u5a5xx.h7147 #define DMA_CLLR_UDA_Pos (27U) macro
7148 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u599xx.h6986 #define DMA_CLLR_UDA_Pos (27U) macro
6987 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u5g7xx.h7443 #define DMA_CLLR_UDA_Pos (27U) macro
7444 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u5g9xx.h7563 #define DMA_CLLR_UDA_Pos (27U) macro
7564 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
Dstm32u5f9xx.h7114 #define DMA_CLLR_UDA_Pos (27U) macro
7115 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…

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