/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 2357 #define DMA_CLLR_UDA_Pos (27U) macro 2358 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32wba52xx.h | 2941 #define DMA_CLLR_UDA_Pos (27U) macro 2942 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32wba54xx.h | 3124 #define DMA_CLLR_UDA_Pos (27U) macro 3125 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32wba55xx.h | 3124 #define DMA_CLLR_UDA_Pos (27U) macro 3125 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 3999 #define DMA_CLLR_UDA_Pos (27U) macro 4000 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h523xx.h | 5363 #define DMA_CLLR_UDA_Pos (27U) macro 5364 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h562xx.h | 5784 #define DMA_CLLR_UDA_Pos (27U) macro 5785 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h533xx.h | 5771 #define DMA_CLLR_UDA_Pos (27U) macro 5772 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h563xx.h | 7868 #define DMA_CLLR_UDA_Pos (27U) macro 7869 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h573xx.h | 8276 #define DMA_CLLR_UDA_Pos (27U) macro 8277 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 5154 #define DMA_CLLR_UDA_Pos (27U) macro 5155 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h7s3xx.h | 5599 #define DMA_CLLR_UDA_Pos (27U) macro 5600 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h7s7xx.h | 5678 #define DMA_CLLR_UDA_Pos (27U) macro 5679 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32h7r7xx.h | 5231 #define DMA_CLLR_UDA_Pos (27U) macro 5232 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 6044 #define DMA_CLLR_UDA_Pos (27U) macro 6045 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u545xx.h | 6444 #define DMA_CLLR_UDA_Pos (27U) macro 6445 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u575xx.h | 6442 #define DMA_CLLR_UDA_Pos (27U) macro 6443 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u585xx.h | 6891 #define DMA_CLLR_UDA_Pos (27U) macro 6892 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u5f7xx.h | 6994 #define DMA_CLLR_UDA_Pos (27U) macro 6995 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u595xx.h | 6698 #define DMA_CLLR_UDA_Pos (27U) macro 6699 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u5a5xx.h | 7147 #define DMA_CLLR_UDA_Pos (27U) macro 7148 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u599xx.h | 6986 #define DMA_CLLR_UDA_Pos (27U) macro 6987 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u5g7xx.h | 7443 #define DMA_CLLR_UDA_Pos (27U) macro 7444 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u5g9xx.h | 7563 #define DMA_CLLR_UDA_Pos (27U) macro 7564 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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D | stm32u5f9xx.h | 7114 #define DMA_CLLR_UDA_Pos (27U) macro 7115 #define DMA_CLLR_UDA_Msk (0x1UL << DMA_CLLR_UDA_Pos) /*!< 0x08000000…
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