/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 2178 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 2179 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32wba52xx.h | 2762 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 2763 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32wba54xx.h | 2945 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 2946 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32wba55xx.h | 2945 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 2946 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 3786 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 3787 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h523xx.h | 5144 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5145 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h562xx.h | 5565 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5566 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h533xx.h | 5552 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5553 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h563xx.h | 7649 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 7650 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h573xx.h | 8057 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 8058 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 4938 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 4939 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h7s3xx.h | 5383 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5384 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h7s7xx.h | 5462 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5463 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32h7r7xx.h | 5015 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5016 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 5828 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 5829 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u545xx.h | 6228 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6229 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u575xx.h | 6226 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6227 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u585xx.h | 6675 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6676 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u5f7xx.h | 6778 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6779 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u595xx.h | 6482 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6483 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u5a5xx.h | 6931 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6932 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u599xx.h | 6770 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6771 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u5g7xx.h | 7227 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 7228 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u5g9xx.h | 7347 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 7348 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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D | stm32u5f9xx.h | 6898 #define DMA_CFCR_TOF_Msk (0x1UL << DMA_CFCR_TOF_Pos) /*!< 0x00004000… macro 6899 #define DMA_CFCR_TOF DMA_CFCR_TOF_Msk /*!< Trigger ov…
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