/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 2165 #define DMA_CFCR_DTEF_Pos (10U) macro 2166 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32wba52xx.h | 2749 #define DMA_CFCR_DTEF_Pos (10U) macro 2750 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32wba54xx.h | 2932 #define DMA_CFCR_DTEF_Pos (10U) macro 2933 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32wba55xx.h | 2932 #define DMA_CFCR_DTEF_Pos (10U) macro 2933 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 3773 #define DMA_CFCR_DTEF_Pos (10U) macro 3774 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h523xx.h | 5131 #define DMA_CFCR_DTEF_Pos (10U) macro 5132 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h562xx.h | 5552 #define DMA_CFCR_DTEF_Pos (10U) macro 5553 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h533xx.h | 5539 #define DMA_CFCR_DTEF_Pos (10U) macro 5540 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h563xx.h | 7636 #define DMA_CFCR_DTEF_Pos (10U) macro 7637 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h573xx.h | 8044 #define DMA_CFCR_DTEF_Pos (10U) macro 8045 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 4925 #define DMA_CFCR_DTEF_Pos (10U) macro 4926 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h7s3xx.h | 5370 #define DMA_CFCR_DTEF_Pos (10U) macro 5371 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h7s7xx.h | 5449 #define DMA_CFCR_DTEF_Pos (10U) macro 5450 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32h7r7xx.h | 5002 #define DMA_CFCR_DTEF_Pos (10U) macro 5003 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 5815 #define DMA_CFCR_DTEF_Pos (10U) macro 5816 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u545xx.h | 6215 #define DMA_CFCR_DTEF_Pos (10U) macro 6216 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u575xx.h | 6213 #define DMA_CFCR_DTEF_Pos (10U) macro 6214 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u585xx.h | 6662 #define DMA_CFCR_DTEF_Pos (10U) macro 6663 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u5f7xx.h | 6765 #define DMA_CFCR_DTEF_Pos (10U) macro 6766 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u595xx.h | 6469 #define DMA_CFCR_DTEF_Pos (10U) macro 6470 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u5a5xx.h | 6918 #define DMA_CFCR_DTEF_Pos (10U) macro 6919 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u599xx.h | 6757 #define DMA_CFCR_DTEF_Pos (10U) macro 6758 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u5g7xx.h | 7214 #define DMA_CFCR_DTEF_Pos (10U) macro 7215 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u5g9xx.h | 7334 #define DMA_CFCR_DTEF_Pos (10U) macro 7335 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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D | stm32u5f9xx.h | 6885 #define DMA_CFCR_DTEF_Pos (10U) macro 6886 #define DMA_CFCR_DTEF_Msk (0x1UL << DMA_CFCR_DTEF_Pos) /*!< 0x00000400…
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