Home
last modified time | relevance | path

Searched refs:DMA_CCR_TCIE (Results 1 – 25 of 206) sorted by relevance

123456789

/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h200 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1358 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1406 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
1455 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
Dstm32c0xx_hal_dma.h287 #define DMA_IT_TC DMA_CCR_TCIE
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h222 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1763 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1820 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
1878 DMA_CCR_TCIE) == (DMA_CCR_TCIE)); in LL_DMA_IsEnabledIT_TC()
Dstm32f1xx_hal_dma.h232 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h253 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1934 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1991 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2049 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
Dstm32l0xx_hal_dma.h337 #define DMA_IT_TC DMA_CCR_TCIE
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_dma.h239 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1966 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2023 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2081 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h223 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1799 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1856 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
1914 DMA_CCR_TCIE) == (DMA_CCR_TCIE)); in LL_DMA_IsEnabledIT_TC()
Dstm32f3xx_hal_dma.h230 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h224 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
1800 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1857 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
1915 DMA_CCR_TCIE) == (DMA_CCR_TCIE)); in LL_DMA_IsEnabledIT_TC()
Dstm32l1xx_hal_dma.h232 #define DMA_IT_TC DMA_CCR_TCIE
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h248 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2068 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2128 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2189 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h236 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2287 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2347 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2408 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h238 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2678 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2741 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2805 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h254 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2039 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2096 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2154 DMA_CCR_TCIE) == (DMA_CCR_TCIE)); in LL_DMA_IsEnabledIT_TC()
Dstm32f0xx_hal_dma.h232 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h264 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2359 …A_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2425 …A_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2492 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h271 #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */
2229 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
2289 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
2350 DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h4198 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
4352 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
4512 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE) in LL_DMA_IsEnabledIT_TC()
4513 == DMA_CCR_TCIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
Dstm32wbaxx_hal_dma.h222 #define DMA_IT_TC DMA_CCR_TCIE /*!< Transfer complete interrupt */
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5981 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
6135 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
6295 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE) in LL_DMA_IsEnabledIT_TC()
6296 == DMA_CCR_TCIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h6201 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
6411 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
6627 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE) in LL_DMA_IsEnabledIT_TC()
6628 == DMA_CCR_TCIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
Dstm32h7rsxx_hal_dma.h222 #define DMA_IT_TC DMA_CCR_TCIE /*!< Transfer complete interrupt */
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h6502 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
6712 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
6928 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE) in LL_DMA_IsEnabledIT_TC()
6929 == DMA_CCR_TCIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TC()
Dstm32u5xx_hal_dma.h222 #define DMA_IT_TC DMA_CCR_TCIE /*!< Transfer complete interrupt */

123456789