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Searched refs:CTR1 (Results 1 – 25 of 43) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h1414 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigTransfer()
1441 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigBurstLength()
1473 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigChannelSecure()
1496 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_D… in LL_DMA_EnableChannelDestSecure()
1518 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelDestSecure()
1542 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelDestSecure()
1567 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_S… in LL_DMA_EnableChannelSrcSecure()
1589 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelSrcSecure()
1613 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelSrcSecure()
1639 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestAllocatedPort()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h2052 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigTransfer()
2079 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigBurstLength()
2111 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigChannelSecure()
2134 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_D… in LL_DMA_EnableChannelDestSecure()
2156 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelDestSecure()
2180 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelDestSecure()
2205 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_S… in LL_DMA_EnableChannelSrcSecure()
2227 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelSrcSecure()
2251 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelSrcSecure()
2277 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestAllocatedPort()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h1968 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigTransfer()
2004 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigBurstLength()
2044 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigChannelSecure()
2075 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_D… in LL_DMA_EnableChannelDestSecure()
2105 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelDestSecure()
2136 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelDestSecure()
2168 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_S… in LL_DMA_EnableChannelSrcSecure()
2198 …CLEAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1… in LL_DMA_DisableChannelSrcSecure()
2229 …return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, … in LL_DMA_IsEnabledChannelSrcSecure()
2263 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestAllocatedPort()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h1936 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigTransfer()
1971 MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, in LL_DMA_ConfigBurstLength()
2005 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestAllocatedPort()
2037 …return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, D… in LL_DMA_GetDestAllocatedPort()
2069 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestWordExchange()
2101 …return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, D… in LL_DMA_GetDestWordExchange()
2133 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestHWordExchange()
2165 …return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, D… in LL_DMA_GetDestHWordExchange()
2197 …MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR… in LL_DMA_SetDestByteExchange()
2229 …return (READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, D… in LL_DMA_GetDestByteExchange()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c360 hdma->Instance->CTR1 = 0U; in HAL_DMA_DeInit()
1413 hdma->Instance->CTR1 |= DMA_CTR1_SSEC; in HAL_DMA_ConfigChannelAttributes()
1417 hdma->Instance->CTR1 &= (~DMA_CTR1_SSEC); in HAL_DMA_ConfigChannelAttributes()
1427 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1431 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1473 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_SSEC) == 0U) ? DMA_CHANNEL_SRC_NSEC : DMA_CHANNEL_… in HAL_DMA_GetConfigChannelAttributes()
1476 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1621 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
1623 WRITE_REG(hdma->Instance->CTR1, tmpreg); in DMA_Init()
Dstm32wbaxx_hal_dma_ex.c680 hdma->Instance->CTR1 = 0U; in HAL_DMAEx_List_DeInit()
3200 MODIFY_REG(hdma->Instance->CTR1, (DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_PAM), in HAL_DMAEx_ConfigDataHandling()
3492 WRITE_REG(hdma->Instance->CTR1, 0U); in DMA_List_Init()
Dstm32wbaxx_ll_dma.c274 LL_DMA_WriteReg(tmp, CTR1, 0U); in LL_DMA_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c367 hdma->Instance->CTR1 = 0U; in HAL_DMA_DeInit()
1427 hdma->Instance->CTR1 |= DMA_CTR1_SSEC; in HAL_DMA_ConfigChannelAttributes()
1431 hdma->Instance->CTR1 &= (~DMA_CTR1_SSEC); in HAL_DMA_ConfigChannelAttributes()
1441 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1445 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1487 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_SSEC) == 0U) ? DMA_CHANNEL_SRC_NSEC : DMA_CHANNEL_… in HAL_DMA_GetConfigChannelAttributes()
1490 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1636 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
1638 WRITE_REG(hdma->Instance->CTR1, tmpreg); in DMA_Init()
Dstm32h5xx_hal_dma_ex.c717 hdma->Instance->CTR1 = 0U; in HAL_DMAEx_List_DeInit()
3271 MODIFY_REG(hdma->Instance->CTR1, (DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_PAM), in HAL_DMAEx_ConfigDataHandling()
3674 WRITE_REG(hdma->Instance->CTR1, 0U); in DMA_List_Init()
Dstm32h5xx_ll_dma.c322 LL_DMA_WriteReg(tmp, CTR1, 0U); in LL_DMA_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma.c360 hdma->Instance->CTR1 = 0U; in HAL_DMA_DeInit()
1420 hdma->Instance->CTR1 |= DMA_CTR1_SSEC; in HAL_DMA_ConfigChannelAttributes()
1424 hdma->Instance->CTR1 &= (~DMA_CTR1_SSEC); in HAL_DMA_ConfigChannelAttributes()
1434 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1438 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1479 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_SSEC) == 0U) ? DMA_CHANNEL_SRC_NSEC : DMA_CHANNEL_… in HAL_DMA_GetConfigChannelAttributes()
1482 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1624 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
Dstm32u5xx_hal_dma_ex.c717 hdma->Instance->CTR1 = 0U; in HAL_DMAEx_List_DeInit()
3272 MODIFY_REG(hdma->Instance->CTR1, (DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_PAM), in HAL_DMAEx_ConfigDataHandling()
3675 WRITE_REG(hdma->Instance->CTR1, 0U); in DMA_List_Init()
Dstm32u5xx_ll_dma.c325 LL_DMA_WriteReg(tmp, CTR1, 0U); in LL_DMA_DeInit()
Dstm32u5xx_hal_ospi.c1537 MODIFY_REG(hospi->hdma->Instance->CTR1, (DMA_CTR1_SINC | DMA_CTR1_DINC), \ in HAL_OSPI_Transmit_DMA()
1722 MODIFY_REG(hospi->hdma->Instance->CTR1, (DMA_CTR1_SINC | DMA_CTR1_DINC), \ in HAL_OSPI_Receive_DMA()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dma.c492 hdma->Instance->CTR1 = 0U; in HAL_DMA_DeInit()
1685 WRITE_REG(hdma->Instance->CTR1, tmpreg); in DMA_Init()
Dstm32h7rsxx_hal_dma_ex.c713 hdma->Instance->CTR1 = 0U; in HAL_DMAEx_List_DeInit()
3251 …MODIFY_REG(hdma->Instance->CTR1, (DMA_CTR1_DWX | DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_… in HAL_DMAEx_ConfigDataHandling()
3654 WRITE_REG(hdma->Instance->CTR1, 0U); in DMA_List_Init()
Dstm32h7rsxx_ll_dma.c357 LL_DMA_WriteReg(tmp, CTR1, 0U); in LL_DMA_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h284 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset:… member
Dstm32wba52xx.h300 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset:… member
Dstm32wba54xx.h317 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset:… member
Dstm32wba55xx.h317 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset:… member
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h410 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset: … member
Dstm32h523xx.h471 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset: … member
Dstm32h562xx.h490 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset: … member
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h543 …__IO uint32_t CTR1; /*!< DMA channel x transfer register 1, Address offset:… member

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