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Searched refs:APB2ENR (Results 1 – 25 of 266) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc_ex.h1167 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
1169 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
1173 #define __HAL_RCC_ADC2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))
1179 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1181 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1187 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
1189 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
1195 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN);\
1197 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN);\
1201 #define __HAL_RCC_TIM15_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM15EN))
[all …]
Dstm32f1xx_hal_rcc.h495 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
497 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
503 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
505 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
511 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
513 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
519 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
521 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
527 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
529 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
[all …]
Dstm32f1xx_ll_bus.h764 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
766 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
821 return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); in LL_APB2_GRP1_IsEnabledClock()
875 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1526 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1528 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1533 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
1535 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
1540 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
1542 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
1547 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
1549 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
1554 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI6EN);\
1556 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI6EN);\
[all …]
Dstm32f4xx_hal_rcc.h564 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
566 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
571 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
573 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
578 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
580 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
585 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
587 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
592 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
594 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
[all …]
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h910 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
912 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
917 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
919 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
924 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
926 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
931 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
933 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
938 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
940 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
[all …]
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1208 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
1210 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
1216 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1218 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1224 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1226 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1232 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
1234 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
1242 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC2EN);\
1244 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC2EN);\
[all …]
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h799 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
801 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
806 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
808 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
813 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
815 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
820 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
822 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
827 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
829 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
[all …]
Dstm32f0xx_hal_rcc_ex.h1237 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1239 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1243 #define __HAL_RCC_TIM15_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM15EN))
1254 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
1256 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
1260 #define __HAL_RCC_USART6_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
1268 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART7EN);\
1270 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART7EN);\
1275 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART8EN);\
1277 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART8EN);\
[all …]
Dstm32f0xx_ll_bus.h666 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB1_GRP2_EnableClock()
668 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB1_GRP2_EnableClock()
705 return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); in LL_APB1_GRP2_IsEnabledClock()
741 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2302 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
2304 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
2308 #define __HAL_RCC_SPI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
2316 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2318 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2322 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
2329 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
2331 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
2335 #define __HAL_RCC_SPI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
2341 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_HRTIM1EN);\
[all …]
Dstm32f3xx_hal_rcc.h850 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
852 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
857 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
859 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
864 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
866 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN);\
871 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN);\
873 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN);\
878 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
880 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
[all …]
Dstm32f3xx_ll_bus.h852 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
854 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
899 return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); in LL_APB2_GRP1_IsEnabledClock()
943 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2176 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
2178 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
2184 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2186 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2192 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
2194 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
2200 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
2202 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
2209 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_UART9EN);\
2211 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_UART9EN);\
[all …]
Dstm32h7xx_ll_bus.h2483 SET_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
2485 tmpreg = READ_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_EnableClock()
2532 return ((READ_BIT(RCC->APB2ENR, Periphs) == Periphs) ? 1U : 0U); in LL_APB2_GRP1_IsEnabledClock()
2578 CLEAR_BIT(RCC->APB2ENR, Periphs); in LL_APB2_GRP1_DisableClock()
4759 SET_BIT(RCC_C1->APB2ENR, Periphs); in LL_C1_APB2_GRP1_EnableClock()
4761 tmpreg = READ_BIT(RCC_C1->APB2ENR, Periphs); in LL_C1_APB2_GRP1_EnableClock()
4808 return ((READ_BIT(RCC_C1->APB2ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C1_APB2_GRP1_IsEnabledClock()
4854 CLEAR_BIT(RCC_C1->APB2ENR, Periphs); in LL_C1_APB2_GRP1_DisableClock()
6514 SET_BIT(RCC_C2->APB2ENR, Periphs); in LL_C2_APB2_GRP1_EnableClock()
6516 tmpreg = READ_BIT(RCC_C2->APB2ENR, Periphs); in LL_C2_APB2_GRP1_EnableClock()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h1101 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1103 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1109 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1111 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1117 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1119 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1125 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1127 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1133 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1135 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1454 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1456 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1462 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \
1464 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \
1471 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \
1473 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \
1480 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1482 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1488 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1490 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h855 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
857 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
862 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
864 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
869 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
871 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
876 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
878 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
883 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
885 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
[all …]
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1244 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1246 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
1252 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1254 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1260 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1262 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1268 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1270 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1276 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1278 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1708 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1710 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1716 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1718 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1724 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1726 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1733 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1735 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1741 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
1743 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1652 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1654 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
1660 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1662 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
1669 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1671 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1678 … SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1680 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
1687 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
1689 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h905 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
907 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
914 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
916 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
923 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
925 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
931 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \
933 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \
940 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \
942 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \
[all …]
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc_ex.h855 #define __HAL_RCC_TIM21_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM21EN))
857 #define __HAL_RCC_TIM22_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM22EN))
859 #define __HAL_RCC_ADC1_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_ADC1EN))
860 #define __HAL_RCC_SPI1_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_SPI1EN))
861 #define __HAL_RCC_USART1_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN))
863 #define __HAL_RCC_TIM21_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM21EN))
865 #define __HAL_RCC_TIM22_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM22EN))
867 #define __HAL_RCC_ADC1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_ADC1EN))
868 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_SPI1EN))
869 #define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN))
[all …]
Dstm32l0xx_hal_rcc.h781 #define __HAL_RCC_SYSCFG_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_SYSCFGEN))
782 #define __HAL_RCC_DBGMCU_CLK_ENABLE() SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_DBGMCUEN))
784 #define __HAL_RCC_SYSCFG_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_SYSCFGEN))
785 #define __HAL_RCC_DBGMCU_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_DBGMCUEN))
853 #define __HAL_RCC_SYSCFG_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) != 0…
854 #define __HAL_RCC_DBGMCU_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DBGMCUEN) != 0…
855 #define __HAL_RCC_SYSCFG_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) == 0…
856 #define __HAL_RCC_DBGMCU_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DBGMCUEN) == 0…
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h1643 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
1645 tmpreg = READ_REG(RCC->APB2ENR);\
1651 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
1653 tmpreg = READ_REG(RCC->APB2ENR);\
1659 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
1661 tmpreg = READ_REG(RCC->APB2ENR);\
1667 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
1669 tmpreg = READ_REG(RCC->APB2ENR);\
1675 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN);\
1677 tmpreg = READ_REG(RCC->APB2ENR);\
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