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Searched refs:AHB5_PLL1_CLKDivider (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-3.7.0/lib/stm32wba/hci/
Dscm.c325 LL_RCC_SetAHB5Prescaler(p_hw_config->AHB5_PLL1_CLKDivider); in ConfigHwPll()
409 scm_system_clock_config.pll.AHB5_PLL1_CLKDivider = LL_RCC_GetAHB5Prescaler(); in scm_init()
508 scm_system_clock_config.pll.AHB5_PLL1_CLKDivider = p_pll_config->AHB5_PLL1_CLKDivider; in scm_pll_setconfig()
Dscm.h81 uint32_t AHB5_PLL1_CLKDivider; member
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c1008 assert_param(IS_RCC_HCLK5_PLL1(RCC_ClkInitStruct->AHB5_PLL1_CLKDivider)); in HAL_RCC_ClockConfig()
1010 … (RCC_ClkInitStruct->AHB5_PLL1_CLKDivider | RCC_ClkInitStruct->AHB5_HSEHSI_CLKDivider)); in HAL_RCC_ClockConfig()
1549 RCC_ClkInitStruct->AHB5_PLL1_CLKDivider = (tmpreg1 & RCC_CFGR4_HPRE5); in HAL_RCC_GetClockConfig()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h132 …uint32_t AHB5_PLL1_CLKDivider; /*!< The AHB5 clock (HCLK5) divider when PLL1 is source of SYSCL… member