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Searched refs:ADC_SMPR3_SMP1_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32l1xx/soc/
Dstm32l151xb.h1033 #define ADC_SMPR3_SMP1_Pos (3U) macro
1034 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1036 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1037 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1038 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xba.h1033 #define ADC_SMPR3_SMP1_Pos (3U) macro
1034 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1036 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1037 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1038 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l100xb.h1032 #define ADC_SMPR3_SMP1_Pos (3U) macro
1033 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1035 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1036 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1037 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l100xba.h1032 #define ADC_SMPR3_SMP1_Pos (3U) macro
1033 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1035 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1036 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1037 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xb.h1050 #define ADC_SMPR3_SMP1_Pos (3U) macro
1051 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1053 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1054 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1055 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xba.h1035 #define ADC_SMPR3_SMP1_Pos (3U) macro
1036 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1038 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1039 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1040 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l100xc.h1077 #define ADC_SMPR3_SMP1_Pos (3U) macro
1078 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1080 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1081 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1082 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xc.h1135 #define ADC_SMPR3_SMP1_Pos (3U) macro
1136 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1138 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1139 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1140 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xca.h1139 #define ADC_SMPR3_SMP1_Pos (3U) macro
1140 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1142 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1143 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1144 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xdx.h1156 #define ADC_SMPR3_SMP1_Pos (3U) macro
1157 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1159 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1160 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1161 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xe.h1156 #define ADC_SMPR3_SMP1_Pos (3U) macro
1157 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1159 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1160 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1161 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xc.h1131 #define ADC_SMPR3_SMP1_Pos (3U) macro
1132 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1134 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1135 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1136 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xca.h1156 #define ADC_SMPR3_SMP1_Pos (3U) macro
1157 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1159 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1160 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1161 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xdx.h1173 #define ADC_SMPR3_SMP1_Pos (3U) macro
1174 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1176 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1177 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1178 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xe.h1173 #define ADC_SMPR3_SMP1_Pos (3U) macro
1174 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1176 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1177 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1178 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l162xca.h1179 #define ADC_SMPR3_SMP1_Pos (3U) macro
1180 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1182 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1183 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1184 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l162xc.h1154 #define ADC_SMPR3_SMP1_Pos (3U) macro
1155 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1157 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1158 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1159 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l162xdx.h1196 #define ADC_SMPR3_SMP1_Pos (3U) macro
1197 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1199 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1200 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1201 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l162xe.h1196 #define ADC_SMPR3_SMP1_Pos (3U) macro
1197 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1199 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1200 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1201 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l151xd.h1213 #define ADC_SMPR3_SMP1_Pos (3U) macro
1214 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1216 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1217 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1218 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l152xd.h1230 #define ADC_SMPR3_SMP1_Pos (3U) macro
1231 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1233 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1234 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1235 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */
Dstm32l162xd.h1253 #define ADC_SMPR3_SMP1_Pos (3U) macro
1254 #define ADC_SMPR3_SMP1_Msk (0x7UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000038 */
1256 #define ADC_SMPR3_SMP1_0 (0x1UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000008 */
1257 #define ADC_SMPR3_SMP1_1 (0x2UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000010 */
1258 #define ADC_SMPR3_SMP1_2 (0x4UL << ADC_SMPR3_SMP1_Pos) /*!< 0x00000020 */