Searched refs:ADC_SMPR1_SMP21_Msk (Results 1 – 22 of 22) sorted by relevance
913 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro914 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
912 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro913 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
930 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro931 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
915 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro916 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
957 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro958 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
994 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro995 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
998 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro999 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1015 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1016 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1011 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1012 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1032 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1033 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1038 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1039 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1034 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1035 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1055 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1056 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1072 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1073 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1089 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1090 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …
1112 #define ADC_SMPR1_SMP21_Msk (0x7UL << ADC_SMPR1_SMP21_Pos) /*!< 0x00000038 */ macro1113 #define ADC_SMPR1_SMP21 ADC_SMPR1_SMP21_Msk /*!< ADC channel 21 …