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Searched refs:ADC_CFGR1_EXTEN (Results 1 – 25 of 103) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h65 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *…
1835 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
1865 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
1869 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U… in LL_ADC_REG_GetTriggerSource()
1875 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
1892 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
1912 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
1927 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32f0xx_hal_adc.h343 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
652 (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h65 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *…
2227 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2260 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2264 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U… in LL_ADC_REG_GetTriggerSource()
2270 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
2287 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
2307 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
2322 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32l0xx_hal_adc.h412 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING (ADC_CFGR1_EXTEN)
717 (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_adc.c619 ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | in LL_ADC_DeInit()
747 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC4_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
1004 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
1022 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
1045 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
1063 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32u5xx_hal_adc.c327 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated
723 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
1021 ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | in HAL_ADC_DeInit()
1122 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC4_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h86 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * …
2467 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2495 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2499 …uint32_t shift_exten = ((trigger_source & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - … in LL_ADC_REG_GetTriggerSource()
2505 | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
2522 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2542 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
2557 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h86 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *…
2341 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2370 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2374 …uint32_t shift_exten = ((trigger_source & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - … in LL_ADC_REG_GetTriggerSource()
2380 | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
2397 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2416 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
2431 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h84 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *…
2289 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2316 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2320 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U… in LL_ADC_REG_GetTriggerSource()
2326 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
2343 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2363 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
2378 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h86 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * …
2659 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2691 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2695 …uint32_t shift_exten = ((trigger_source & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - … in LL_ADC_REG_GetTriggerSource()
2701 | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
2718 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2737 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
2752 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h191 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *…
4083 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
4087 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC4_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
4132 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
4136 …uint32_t shift_exten = ((trigger_source & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - … in LL_ADC_REG_GetTriggerSource()
4142 | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
4147 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC4_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
4151 …uint32_t shift_exten = ((trigger_source & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - … in LL_ADC_REG_GetTriggerSource()
4157 | ((ADC_REG_TRIG_EDGE_MASK >> shift_exten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
4175 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
[all …]
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_adc.c379 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
609 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
630 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32wbaxx_hal_adc.c637 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
822 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_adc.c406 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
672 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
693 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32wlxx_hal_adc.c595 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
790 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_adc.c400 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
663 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
684 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32c0xx_hal_adc.c599 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
799 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_adc.c425 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
690 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
711 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32g0xx_hal_adc.c596 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
796 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h3407 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3448 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
3452 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U… in LL_ADC_REG_GetTriggerSource()
3458 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN) in LL_ADC_REG_GetTriggerSource()
3490 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
3514 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3533 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_adc.c631 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
1007 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
1028 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_adc.c285 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
496 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32f0xx_hal_adc.c519 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
696 … ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | in HAL_ADC_DeInit()
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_adc.c389 | ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES in LL_ADC_DeInit()
607 | ADC_CFGR1_EXTEN in LL_ADC_REG_Init()
Dstm32l0xx_hal_adc.c528 ADC_CFGR1_EXTEN | in HAL_ADC_Init()
701 ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN | \ in HAL_ADC_DeInit()

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