/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 990 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1021 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32c011xx.h | 986 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1017 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 1061 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1092 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g030xx.h | 1039 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1070 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g050xx.h | 1058 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1089 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g031xx.h | 1082 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1113 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g041xx.h | 1129 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1160 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g051xx.h | 1145 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1176 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g061xx.h | 1192 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1223 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g071xx.h | 1194 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1225 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g081xx.h | 1241 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1272 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g0b0xx.h | 1143 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1174 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g0b1xx.h | 1361 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1392 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32g0c1xx.h | 1408 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1439 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle5xx.h | 1368 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1399 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32wle4xx.h | 1368 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1399 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32wl54xx.h | 1550 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1581 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32wl5mxx.h | 1550 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1581 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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D | stm32wl55xx.h | 1550 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro 1581 #define ADC_TR2_LT2_6 ADC_AWD2TR_LT2_6
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1458 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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D | stm32wba52xx.h | 1938 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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D | stm32wba54xx.h | 2054 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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D | stm32wba55xx.h | 2054 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4144 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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D | stm32u545xx.h | 4308 #define ADC_AWD2TR_LT2_6 (0x040UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000040 */ macro
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