/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 1002 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1031 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32c011xx.h | 998 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1027 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 1073 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1102 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g030xx.h | 1051 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1080 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g050xx.h | 1070 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1099 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g031xx.h | 1094 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1123 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g041xx.h | 1141 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1170 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g051xx.h | 1157 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1186 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g061xx.h | 1204 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1233 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g071xx.h | 1206 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1235 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g081xx.h | 1253 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1282 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g0b0xx.h | 1155 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1184 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g0b1xx.h | 1373 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1402 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32g0c1xx.h | 1420 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1449 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle5xx.h | 1380 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1409 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32wle4xx.h | 1380 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1409 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32wl54xx.h | 1562 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1591 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32wl5mxx.h | 1562 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1591 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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D | stm32wl55xx.h | 1562 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro 1591 #define ADC_TR2_HT2_2 ADC_AWD2TR_HT2_2
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1470 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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D | stm32wba52xx.h | 1950 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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D | stm32wba54xx.h | 2066 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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D | stm32wba55xx.h | 2066 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4156 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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D | stm32u545xx.h | 4320 #define ADC_AWD2TR_HT2_2 (0x004UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00040000 */ macro
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