/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 926 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 957 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32c011xx.h | 922 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 953 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 997 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1028 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g030xx.h | 975 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1006 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g050xx.h | 994 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1025 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g031xx.h | 1018 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1049 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g041xx.h | 1065 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1096 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g051xx.h | 1081 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1112 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g061xx.h | 1128 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1159 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g071xx.h | 1130 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1161 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g081xx.h | 1177 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1208 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g0b0xx.h | 1079 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1110 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g0b1xx.h | 1297 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1328 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32g0c1xx.h | 1344 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1375 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle5xx.h | 1304 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1335 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32wle4xx.h | 1304 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1335 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32wl54xx.h | 1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32wl5mxx.h | 1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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D | stm32wl55xx.h | 1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro 1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1423 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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D | stm32wba52xx.h | 1903 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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D | stm32wba54xx.h | 2019 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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D | stm32wba55xx.h | 2019 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4109 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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D | stm32u545xx.h | 4273 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
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