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Searched refs:ADC_AWD1TR_LT1_4 (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h926 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
957 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32c011xx.h922 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
953 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h997 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1028 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g030xx.h975 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1006 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g050xx.h994 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1025 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g031xx.h1018 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1049 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g041xx.h1065 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1096 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g051xx.h1081 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1112 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g061xx.h1128 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1159 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g071xx.h1130 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1161 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g081xx.h1177 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1208 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g0b0xx.h1079 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1110 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g0b1xx.h1297 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1328 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32g0c1xx.h1344 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1375 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/
Dstm32wle5xx.h1304 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1335 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32wle4xx.h1304 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1335 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32wl54xx.h1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32wl5mxx.h1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
Dstm32wl55xx.h1486 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
1517 #define ADC_TR1_LT1_4 ADC_AWD1TR_LT1_4
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1423 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
Dstm32wba52xx.h1903 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
Dstm32wba54xx.h2019 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
Dstm32wba55xx.h2019 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h4109 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro
Dstm32u545xx.h4273 #define ADC_AWD1TR_LT1_4 (0x010UL << ADC_AWD1TR_LT1_Pos) /*!< 0x00000010 */ macro

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