/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 947 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 976 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32c011xx.h | 943 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 972 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 1018 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1047 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g030xx.h | 996 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1025 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g050xx.h | 1015 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1044 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g031xx.h | 1039 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1068 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g041xx.h | 1086 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1115 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g051xx.h | 1102 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1131 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g061xx.h | 1149 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1178 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g071xx.h | 1151 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1180 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g081xx.h | 1198 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1227 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g0b0xx.h | 1100 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1129 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g0b1xx.h | 1318 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1347 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32g0c1xx.h | 1365 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1394 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle5xx.h | 1325 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1354 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32wle4xx.h | 1325 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1354 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32wl54xx.h | 1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32wl5mxx.h | 1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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D | stm32wl55xx.h | 1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro 1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1444 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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D | stm32wba52xx.h | 1924 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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D | stm32wba54xx.h | 2040 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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D | stm32wba55xx.h | 2040 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4130 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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D | stm32u545xx.h | 4294 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
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