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Searched refs:ADC_AWD1TR_HT1_9 (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h947 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
976 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32c011xx.h943 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
972 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h1018 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1047 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g030xx.h996 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1025 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g050xx.h1015 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1044 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g031xx.h1039 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1068 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g041xx.h1086 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1115 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g051xx.h1102 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1131 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g061xx.h1149 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1178 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g071xx.h1151 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1180 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g081xx.h1198 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1227 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g0b0xx.h1100 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1129 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g0b1xx.h1318 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1347 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32g0c1xx.h1365 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1394 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/
Dstm32wle5xx.h1325 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1354 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32wle4xx.h1325 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1354 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32wl54xx.h1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32wl5mxx.h1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
Dstm32wl55xx.h1507 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
1536 #define ADC_TR1_HT1_9 ADC_AWD1TR_HT1_9
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h1444 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
Dstm32wba52xx.h1924 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
Dstm32wba54xx.h2040 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
Dstm32wba55xx.h2040 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h4130 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro
Dstm32u545xx.h4294 #define ADC_AWD1TR_HT1_9 (0x200UL << ADC_AWD1TR_HT1_Pos) /*!< 0x02000000 */ macro

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