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Searched refs:btcr_reg (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_fmc.c181 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
217 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
230 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
231 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
232 btcr_reg |= Init->NBLSetupTime; in FMC_NORSRAM_Init()
233 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
254 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_fmc.c177 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
213 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
226 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
227 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
228 btcr_reg |= Init->NBLSetupTime; in FMC_NORSRAM_Init()
229 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
250 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_fmc.c176 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
212 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
225 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
226 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
227 btcr_reg |= Init->NBLSetupTime; in FMC_NORSRAM_Init()
228 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
249 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_fmc.c195 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
237 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
250 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
252 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
255 btcr_reg |= Init->NBLSetupTime; in FMC_NORSRAM_Init()
257 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
282 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_fsmc.c159 uint32_t btcr_reg; in FSMC_NORSRAM_Init() local
192 btcr_reg = (flashaccess | \ in FSMC_NORSRAM_Init()
205 btcr_reg |= Init->WrapMode; in FSMC_NORSRAM_Init()
206 btcr_reg |= Init->PageSize; in FSMC_NORSRAM_Init()
225 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FSMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_fsmc.c223 uint32_t btcr_reg; in FSMC_NORSRAM_Init() local
264 btcr_reg = (flashaccess | \ in FSMC_NORSRAM_Init()
278 btcr_reg |= Init->WrapMode; in FSMC_NORSRAM_Init()
281 btcr_reg |= Init->ContinuousClock; in FSMC_NORSRAM_Init()
284 btcr_reg |= Init->WriteFifo; in FSMC_NORSRAM_Init()
286 btcr_reg |= Init->PageSize; in FSMC_NORSRAM_Init()
313 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FSMC_NORSRAM_Init()
Dstm32f4xx_ll_fmc.c242 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
283 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
297 btcr_reg |= Init->WrapMode; in FMC_NORSRAM_Init()
300 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
303 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
305 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
332 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_fmc.c201 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
237 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
250 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
251 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
252 btcr_reg |= Init->NBLSetupTime; in FMC_NORSRAM_Init()
253 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
274 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_fmc.c193 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
227 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
240 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
241 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
242 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
262 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_fmc.c193 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
227 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
240 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
241 btcr_reg |= Init->WriteFifo; in FMC_NORSRAM_Init()
242 btcr_reg |= Init->PageSize; in FMC_NORSRAM_Init()
262 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_fsmc.c212 uint32_t btcr_reg; in FSMC_NORSRAM_Init() local
245 btcr_reg = (flashaccess | \ in FSMC_NORSRAM_Init()
258 btcr_reg |= Init->WrapMode; in FSMC_NORSRAM_Init()
259 btcr_reg |= Init->PageSize; in FSMC_NORSRAM_Init()
278 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FSMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_fmc.c204 uint32_t btcr_reg; in FMC_NORSRAM_Init() local
237 btcr_reg = (flashaccess | \ in FMC_NORSRAM_Init()
250 btcr_reg |= Init->WrapMode; in FMC_NORSRAM_Init()
251 btcr_reg |= Init->ContinuousClock; in FMC_NORSRAM_Init()
270 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FMC_NORSRAM_Init()
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_fsmc.c199 uint32_t btcr_reg; in FSMC_NORSRAM_Init() local
231 btcr_reg = (flashaccess | \ in FSMC_NORSRAM_Init()
244 btcr_reg |= Init->WrapMode; in FSMC_NORSRAM_Init()
262 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FSMC_NORSRAM_Init()