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Searched refs:XSPI_DCR2_WRAPSIZE_Pos (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h11567 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
11568 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11570 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11571 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11572 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11985 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u545xx.h11967 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
11968 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11970 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11971 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
11972 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12385 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5f7xx.h14401 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
14402 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14404 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14405 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14406 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14853 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
15267 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u595xx.h12903 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
12904 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12906 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12907 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12908 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13355 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
13769 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5a5xx.h13352 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
13353 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13355 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13356 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13357 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13804 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
14218 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u575xx.h12590 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
12591 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12593 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12594 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
12595 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13008 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u599xx.h16622 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
16623 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
16625 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
16626 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
16627 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17074 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
17488 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5g7xx.h14850 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
14851 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14853 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14854 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
14855 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
15302 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
15716 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u585xx.h13039 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
13040 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13042 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13043 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13044 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
13457 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5a9xx.h17071 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
17072 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17074 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17075 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17076 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17523 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
17937 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5f9xx.h17527 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
17528 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17530 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17531 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17532 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17979 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
18393 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32u5g9xx.h17976 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
17977 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17979 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17980 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
17981 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00…
18428 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
18842 #define HSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h11553 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
11554 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
11556 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
11557 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
11558 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
11965 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32h563xx.h13637 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
13638 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
13640 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
13641 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
13642 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
14049 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos
Dstm32h573xx.h14072 #define XSPI_DCR2_WRAPSIZE_Pos (16U) macro
14073 #define XSPI_DCR2_WRAPSIZE_Msk (0x7UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
14075 #define XSPI_DCR2_WRAPSIZE_0 (0x1UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
14076 #define XSPI_DCR2_WRAPSIZE_1 (0x2UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
14077 #define XSPI_DCR2_WRAPSIZE_2 (0x4UL << XSPI_DCR2_WRAPSIZE_Pos) /*!< 0x000…
14484 #define OCTOSPI_DCR2_WRAPSIZE_Pos XSPI_DCR2_WRAPSIZE_Pos