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Searched refs:XSPI_DCR1_MTYP_2 (Results 1 – 17 of 17) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_xspi.h334 #define HAL_XSPI_MEMTYPE_HYPERBUS (XSPI_DCR1_MTYP_2) /*!< Hyperbus …
335 #define HAL_XSPI_MEMTYPE_APMEM_16BITS ((XSPI_DCR1_MTYP_2 | XSPI_DCR1_MTYP_1)) /*!< AP Memory…
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_xspi.h386 #define HAL_XSPI_MEMTYPE_HYPERBUS (XSPI_DCR1_MTYP_2) /*!< Hyperbus …
387 #define HAL_XSPI_MEMTYPE_APMEM_16BITS ((XSPI_DCR1_MTYP_2 | XSPI_DCR1_MTYP_1)) /*!< AP Memory…
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h14395 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
14847 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
15261 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u595xx.h12897 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
13349 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
13763 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u5a5xx.h13346 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
13798 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
14212 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u599xx.h16616 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
17068 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
17482 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u5g7xx.h14844 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
15296 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
15710 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u5a9xx.h17065 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
17517 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
17931 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u5f9xx.h17521 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
17973 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
18387 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u5g9xx.h17970 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
18422 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
18836 #define HSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u535xx.h11561 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
11979 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u545xx.h11961 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
12379 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u575xx.h12584 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
13002 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32u585xx.h13033 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x04… macro
13451 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h11547 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x040… macro
11959 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32h563xx.h13631 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x040… macro
14043 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…
Dstm32h573xx.h14066 #define XSPI_DCR1_MTYP_2 (0x4UL << XSPI_DCR1_MTYP_Pos) /*!< 0x040… macro
14478 #define OCTOSPI_DCR1_MTYP_2 XSPI_DCR1_MTYP_2 /*!< 0x04…