Searched refs:RCC_CCIPR1_CLK48MSEL_0 (Results 1 – 5 of 5) sorted by relevance
465 #define RCC_SDMMC1CLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 "Q" clock (PLL48M2CLK) v…477 #define RCC_RNGCLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 "Q" clock (PLL48M2CLK) */489 #define RCC_USBCLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 "Q" clock (PLL48M2CLK) */
492 #define LL_RCC_SDMMC1_CLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 clock used as SDMMC1…503 #define LL_RCC_RNG_CLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 clock used as RNG cl…514 #define LL_RCC_USB_CLKSOURCE_PLLSAI1 RCC_CCIPR1_CLK48MSEL_0 /*!< PLLSAI1 clock used as USB cl…
946 case RCC_CCIPR1_CLK48MSEL_0: /* PLLSAI1 ? */ in HAL_RCCEx_GetPeriphCLKFreq()1028 case RCC_CCIPR1_CLK48MSEL_0: /* PLLSAI1 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
12137 #define RCC_CCIPR1_CLK48MSEL_0 (0x1UL << RCC_CCIPR1_CLK48MSEL_Pos) /*!< 0x04000000 */ macro
12867 #define RCC_CCIPR1_CLK48MSEL_0 (0x1UL << RCC_CCIPR1_CLK48MSEL_Pos) /*!< 0x04000000 */ macro
