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Searched refs:PWR_SVMSR_REGS (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_pwr_ex.c298 while (HAL_IS_BIT_SET(PWR->SVMSR, PWR_SVMSR_REGS) && (timeout != 0U)) in HAL_PWREx_ConfigSupply()
310 while (HAL_IS_BIT_CLR(PWR->SVMSR, PWR_SVMSR_REGS) && (timeout != 0U)) in HAL_PWREx_ConfigSupply()
331 return (PWR->SVMSR & PWR_SVMSR_REGS); in HAL_PWREx_GetSupplyConfig()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_pwr.h78 #define LL_PWR_FLAG_REGS PWR_SVMSR_REGS /*!< Regulator selection flag …
1395 #if defined(PWR_SVMSR_REGS)
1403 return ((READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == (PWR_SVMSR_REGS)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGULATOR()
Dstm32wbaxx_hal_pwr.h141 #if defined(PWR_SVMSR_REGS)
391 … ((__FLAG__) == PWR_FLAG_REGS) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS)== \
392 PWR_SVMSR_REGS) : \
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_pwr.h380 …FLAG__) == PWR_FLAG_REGS) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == PWR_SVMSR_REGS) …
405 …__FLAG__) == PWR_FLAG_REGS) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == PWR_SVMSR_REGS) …
Dstm32u5xx_ll_pwr.h86 #define LL_PWR_FLAG_REGS PWR_SVMSR_REGS /*!< Regulator selection flag …
2933 return ((READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == (PWR_SVMSR_REGS)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGULATOR()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_pwr_ex.c440 while (HAL_IS_BIT_SET(PWR->SVMSR, PWR_SVMSR_REGS) && (timeout != 0U)) in HAL_PWREx_ConfigSupply()
452 while (HAL_IS_BIT_CLR(PWR->SVMSR, PWR_SVMSR_REGS) && (timeout != 0U)) in HAL_PWREx_ConfigSupply()
473 return (PWR->SVMSR & PWR_SVMSR_REGS); in HAL_PWREx_GetSupplyConfig()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/
Dstm32wba55xx.h9356 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h12674 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u545xx.h13187 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u575xx.h13831 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5f7xx.h16152 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u595xx.h14651 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5a5xx.h15213 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u585xx.h14393 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u599xx.h18370 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5g7xx.h16714 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5a9xx.h18932 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5f9xx.h19281 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro
Dstm32u5g9xx.h19843 #define PWR_SVMSR_REGS PWR_SVMSR_REGS_Msk /*!< Regulator … macro