PWR_CR2_DC1RAMPDS_Pos (reference) in projects: hal_stm32-3.6.0

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Searched refs:PWR_CR2_DC1RAMPDS_Pos (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_hal_pwr_ex.c	`1852 CLEAR_BIT(PWR->CR2, dummy << PWR_CR2_DC1RAMPDS_Pos); in HAL_PWREx_EnableRAMsContentStopRetention() 2102 SET_BIT(PWR->CR2, (dummy << PWR_CR2_DC1RAMPDS_Pos)); in HAL_PWREx_DisableRAMsContentStopRetention()`
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
D	stm32u535xx.h	`12426 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 12427 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u545xx.h	`12936 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 12937 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u575xx.h	`13549 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 13550 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5f7xx.h	`15852 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 15853 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u595xx.h	`14351 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 14352 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5a5xx.h	`14910 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 14911 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u585xx.h	`14108 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 14109 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u599xx.h	`18070 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 18071 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5g7xx.h	`16411 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 16412 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5a9xx.h	`18629 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 18630 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5f9xx.h	`18978 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 18979 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`
D	stm32u5g9xx.h	`19537 #define PWR_CR2_DC1RAMPDS_Pos (9U) macro 19538 #define PWR_CR2_DC1RAMPDS_Msk (0x1UL << PWR_CR2_DC1RAMPDS_Pos) /*!< 0x00000200…`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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