Home
last modified time | relevance | path

Searched refs:LL_RCC_SYSCLK_DIV_2 (Results 1 – 25 of 39) sorted by relevance

12

/hal_stm32-3.6.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_utils.c65 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
449 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
450 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
527 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
528 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
623 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
624 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_utils.c90 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
529 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
530 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
616 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
617 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
721 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
722 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_utils.c79 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
429 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
430 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
526 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
527 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_utils.c85 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
523 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
524 hpre = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
/hal_stm32-3.6.0/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_utils.c68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_utils.c68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_utils.c70 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_utils.c62 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_utils.c68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_utils.c62 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_utils.c68 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_utils.c65 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_utils.c83 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_utils.c66 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_utils.c112 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_utils.c67 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_utils.c101 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_utils.c159 || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \
/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_rcc.h217 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_3 … macro
/hal_stm32-3.6.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h214 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-3.6.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h242 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h214 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-3.6.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h259 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_rcc.h198 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h237 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro

12