Searched refs:GTZC_CFGR3_GFXMMU_REG_Pos (Results 1 – 7 of 7) sorted by relevance
289 #define GTZC_PERIPH_GFXMMU_REG (GTZC1_PERIPH_REG3 | GTZC_CFGR3_GFXMMU_REG_Pos)
22289 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro22290 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)22507 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos22659 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos22811 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23029 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23247 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
24470 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro24471 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)24682 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos24832 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos24982 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25194 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25406 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
22905 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro22906 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)23133 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23291 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23449 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23677 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23905 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
25086 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro25087 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)25308 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25464 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25620 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25842 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26064 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
25432 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro25433 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)25652 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25806 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25960 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26180 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26400 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
26048 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro26049 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)26278 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26438 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26598 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26828 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos27058 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos