Searched refs:FSMC_PMEM4_MEMSET4_Pos (Results 1 – 8 of 8) sorted by relevance
7484 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7485 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7487 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7488 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7489 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7490 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7491 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7492 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7493 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7494 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7784 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7785 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7787 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7788 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7789 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7790 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7791 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7792 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7793 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7794 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7666 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7667 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7669 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7670 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7671 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7672 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7673 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7674 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7675 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7676 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7963 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7964 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7966 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7967 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7968 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7969 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7970 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7971 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7972 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7973 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7590 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7591 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7593 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7594 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7595 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7596 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7597 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7598 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7599 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7600 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7440 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7441 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7443 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7444 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7445 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7446 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7447 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7448 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7449 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7450 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7889 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7890 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7892 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7893 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7894 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7895 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7896 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7897 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7898 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7899 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
7739 #define FSMC_PMEM4_MEMSET4_Pos (0U) macro7740 #define FSMC_PMEM4_MEMSET4_Msk (0xFFUL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x000000FF */7742 #define FSMC_PMEM4_MEMSET4_0 (0x01UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000001 */7743 #define FSMC_PMEM4_MEMSET4_1 (0x02UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000002 */7744 #define FSMC_PMEM4_MEMSET4_2 (0x04UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000004 */7745 #define FSMC_PMEM4_MEMSET4_3 (0x08UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000008 */7746 #define FSMC_PMEM4_MEMSET4_4 (0x10UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000010 */7747 #define FSMC_PMEM4_MEMSET4_5 (0x20UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000020 */7748 #define FSMC_PMEM4_MEMSET4_6 (0x40UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000040 */7749 #define FSMC_PMEM4_MEMSET4_7 (0x80UL << FSMC_PMEM4_MEMSET4_Pos) /*!< 0x00000080 */
