Searched refs:FSMC_PMEM3_MEMWAIT3_Pos (Results 1 – 9 of 9) sorted by relevance
560 … ((Timing->WaitSetupTime) << FSMC_PMEM3_MEMWAIT3_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()568 … ((Timing->WaitSetupTime) << FSMC_PMEM3_MEMWAIT3_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()
7447 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7448 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7450 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7451 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7452 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7453 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7454 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7455 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7456 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7457 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7747 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7748 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7750 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7751 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7752 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7753 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7754 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7755 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7756 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7757 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7629 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7630 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7632 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7633 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7634 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7635 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7636 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7637 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7638 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7639 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7926 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7927 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7929 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7930 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7931 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7932 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7933 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7934 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7935 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7936 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7553 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7554 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7556 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7557 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7558 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7559 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7560 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7561 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7562 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7563 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7403 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7404 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7406 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7407 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7408 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7409 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7410 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7411 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7412 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7413 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7852 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7853 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7855 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7856 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7857 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7858 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7859 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7860 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7861 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7862 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
7702 #define FSMC_PMEM3_MEMWAIT3_Pos (8U) macro7703 #define FSMC_PMEM3_MEMWAIT3_Msk (0xFFUL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x0000FF00 */7705 #define FSMC_PMEM3_MEMWAIT3_0 (0x01UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000100 */7706 #define FSMC_PMEM3_MEMWAIT3_1 (0x02UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000200 */7707 #define FSMC_PMEM3_MEMWAIT3_2 (0x04UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000400 */7708 #define FSMC_PMEM3_MEMWAIT3_3 (0x08UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00000800 */7709 #define FSMC_PMEM3_MEMWAIT3_4 (0x10UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00001000 */7710 #define FSMC_PMEM3_MEMWAIT3_5 (0x20UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00002000 */7711 #define FSMC_PMEM3_MEMWAIT3_6 (0x40UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00004000 */7712 #define FSMC_PMEM3_MEMWAIT3_7 (0x80UL << FSMC_PMEM3_MEMWAIT3_Pos) /*!< 0x00008000 */
