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Searched refs:FMC_PMEM_MEMWAIT3_Pos (Results 1 – 25 of 39) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_fmc.c565 ((Timing->WaitSetupTime) << FMC_PMEM_MEMWAIT3_Pos) | in FMC_NAND_CommonSpace_Timing_Init()
/hal_stm32-3.6.0/stm32cube/stm32f7xx/soc/
Dstm32f722xx.h7200 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7201 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7203 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7204 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7205 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7206 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7207 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7208 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
7209 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
7210 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f723xx.h7216 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7217 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7219 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7220 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7221 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7222 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7223 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7224 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
7225 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
7226 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f733xx.h7430 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7431 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7433 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7434 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7435 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7436 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7437 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7438 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
7439 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
7440 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f730xx.h7430 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7431 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7433 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7434 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7435 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7436 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7437 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7438 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
7439 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
7440 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f732xx.h7414 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7415 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7417 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7418 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7419 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7420 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7421 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7422 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
7423 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
7424 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f746xx.h8046 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8047 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8049 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8050 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8051 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8052 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8053 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8054 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8055 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8056 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f745xx.h7991 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
7992 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
7994 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
7995 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
7996 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
7997 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
7998 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
7999 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8000 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8001 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f765xx.h8504 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8505 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8507 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8508 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8509 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8510 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8511 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8512 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8513 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8514 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f750xx.h8234 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8235 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8237 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8238 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8239 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8240 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8241 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8242 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8243 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8244 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f756xx.h8234 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8235 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8237 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8238 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8239 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8240 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8241 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8242 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8243 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8244 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f767xx.h8598 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8599 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8601 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8602 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8603 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8604 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8605 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8606 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8607 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8608 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f777xx.h8786 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8787 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8789 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8790 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8791 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8792 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8793 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8794 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8795 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8796 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f779xx.h8869 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8870 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8872 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8873 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8874 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8875 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8876 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8877 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8878 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8879 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32f769xx.h8681 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
8682 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
8684 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
8685 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
8686 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
8687 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
8688 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
8689 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
8690 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
8691 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
/hal_stm32-3.6.0/stm32cube/stm32mp1xx/soc/
Dstm32mp151axx_ca7.h18808 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18809 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18811 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18812 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18813 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18814 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18815 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18816 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18817 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18818 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151fxx_ca7.h19005 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
19006 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
19008 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
19009 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
19010 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
19011 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
19012 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
19013 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
19014 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
19015 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151fxx_cm4.h18971 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18972 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18974 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18975 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18976 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18977 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18978 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18979 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18980 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18981 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151cxx_ca7.h19005 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
19006 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
19008 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
19009 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
19010 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
19011 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
19012 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
19013 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
19014 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
19015 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151dxx_ca7.h18808 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18809 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18811 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18812 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18813 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18814 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18815 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18816 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18817 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18818 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151axx_cm4.h18774 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18775 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18777 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18778 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18779 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18780 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18781 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18782 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18783 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18784 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151dxx_cm4.h18774 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18775 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18777 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18778 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18779 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18780 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18781 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18782 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18783 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18784 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp151cxx_cm4.h18971 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
18972 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
18974 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
18975 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
18976 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
18977 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
18978 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
18979 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
18980 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
18981 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp153axx_ca7.h20359 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
20360 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
20362 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
20363 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
20364 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
20365 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
20366 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
20367 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
20368 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
20369 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */
Dstm32mp153cxx_ca7.h20556 #define FMC_PMEM_MEMWAIT3_Pos (8U) macro
20557 #define FMC_PMEM_MEMWAIT3_Msk (0xFFUL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x0000FF00 */
20559 #define FMC_PMEM_MEMWAIT3_0 (0x01UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000100 */
20560 #define FMC_PMEM_MEMWAIT3_1 (0x02UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000200 */
20561 #define FMC_PMEM_MEMWAIT3_2 (0x04UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000400 */
20562 #define FMC_PMEM_MEMWAIT3_3 (0x08UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00000800 */
20563 #define FMC_PMEM_MEMWAIT3_4 (0x10UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00001000 */
20564 #define FMC_PMEM_MEMWAIT3_5 (0x20UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00002000 */
20565 #define FMC_PMEM_MEMWAIT3_6 (0x40UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00004000 */
20566 #define FMC_PMEM_MEMWAIT3_7 (0x80UL << FMC_PMEM_MEMWAIT3_Pos) /*!< 0x00008000 */

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