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Searched refs:DMA_CTR1_DSEC (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c1427 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1431 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1476 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1621 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
Dstm32wbaxx_hal_dma_ex.c3539 pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] |= DMA_CTR1_DSEC; in DMA_List_BuildNode()
3655 if ((pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DSEC) != 0U) in DMA_List_GetNodeConfig()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma.c1457 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1461 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1506 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1649 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
Dstm32u5xx_hal_dma_ex.c3736 pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] |= DMA_CTR1_DSEC; in DMA_List_BuildNode()
3965 if ((pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DSEC) != 0U) in DMA_List_GetNodeConfig()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c1452 hdma->Instance->CTR1 |= DMA_CTR1_DSEC; in HAL_DMA_ConfigChannelAttributes()
1456 hdma->Instance->CTR1 &= (~DMA_CTR1_DSEC); in HAL_DMA_ConfigChannelAttributes()
1501 …attributes |= ((hdma->Instance->CTR1 & DMA_CTR1_DSEC) == 0U) ? DMA_CHANNEL_DEST_NSEC : DMA_CHANNEL… in HAL_DMA_GetConfigChannelAttributes()
1647 MODIFY_REG(hdma->Instance->CTR1, ~(DMA_CTR1_SSEC | DMA_CTR1_DSEC), tmpreg); in DMA_Init()
Dstm32h5xx_hal_dma_ex.c3735 pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] |= DMA_CTR1_DSEC; in DMA_List_BuildNode()
3967 if ((pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DSEC) != 0U) in DMA_List_GetNodeConfig()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h731 #define LL_DMA_CHANNEL_DEST_SEC DMA_CTR1_DSEC /*!< Secure transfer from the destination */
1474 (DMA_CTR1_SSEC | DMA_CTR1_DSEC), (Configuration & (~LL_DMA_CHANNEL_SEC))); in LL_DMA_ConfigChannelSecure()
1496 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_EnableChannelDestSecure()
1518 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_DisableChannelDestSecure()
1542 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC) in LL_DMA_IsEnabledChannelDestSecure()
1543 == (DMA_CTR1_DSEC)) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelDestSecure()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h911 #define LL_DMA_CHANNEL_DEST_SEC DMA_CTR1_DSEC /*!< Secure transfer from the destination */
2112 (DMA_CTR1_DSEC | DMA_CTR1_DSEC), (Configuration & (~LL_DMA_CHANNEL_SEC))); in LL_DMA_ConfigChannelSecure()
2134 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_EnableChannelDestSecure()
2156 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_DisableChannelDestSecure()
2178 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC) in LL_DMA_IsEnabledChannelDestSecure()
2179 == (DMA_CTR1_DSEC)) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelDestSecure()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h921 #define LL_DMA_CHANNEL_DEST_SEC DMA_CTR1_DSEC /*!< Secure transfer from the destination */
2045 (DMA_CTR1_SSEC | DMA_CTR1_DSEC), (Configuration & (~LL_DMA_CHANNEL_SEC))); in LL_DMA_ConfigChannelSecure()
2075 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_EnableChannelDestSecure()
2105 …BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC); in LL_DMA_DisableChannelDestSecure()
2135 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DSEC) in LL_DMA_IsEnabledChannelDestSecure()
2136 == (DMA_CTR1_DSEC)) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelDestSecure()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2301 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32wba52xx.h2885 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32wba54xx.h3068 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32wba55xx.h3068 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h5937 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u545xx.h6337 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u575xx.h6336 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u5f7xx.h6886 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u595xx.h6590 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u5a5xx.h7039 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u585xx.h6785 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u599xx.h6878 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32u5g7xx.h7335 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h5663 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32h563xx.h7747 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro
Dstm32h573xx.h8182 #define DMA_CTR1_DSEC DMA_CTR1_DSEC_Msk /*!< Security a… macro

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