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Searched refs:DMABMR (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_eth.c376 SET_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR); in HAL_ETH_Init()
382 while (READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR) > 0U) in HAL_ETH_Init()
2237 dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMABMR, in HAL_ETH_GetDMAConfig()
2239 …dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_AAB) >> 25U) > 0U) ? … in HAL_ETH_GetDMAConfig()
2240 dmaconf->BurstMode = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_FB | ETH_DMABMR_MB); in HAL_ETH_GetDMAConfig()
2241 dmaconf->RxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_RDP); in HAL_ETH_GetDMAConfig()
2242 dmaconf->TxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_PBL); in HAL_ETH_GetDMAConfig()
2243 …dmaconf->EnhancedDescriptorFormat = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_EDE) >> 7) > 0U)… in HAL_ETH_GetDMAConfig()
2244 dmaconf->DescriptorSkipLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_DSL) >> 2; in HAL_ETH_GetDMAConfig()
2821 (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | in ETH_SetDMAConfig()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_eth.c376 SET_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR); in HAL_ETH_Init()
382 while (READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_SR) > 0U) in HAL_ETH_Init()
2237 dmaconf->DMAArbitration = READ_BIT(heth->Instance->DMABMR, in HAL_ETH_GetDMAConfig()
2239 …dmaconf->AddressAlignedBeats = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_AAB) >> 25U) > 0U) ? … in HAL_ETH_GetDMAConfig()
2240 dmaconf->BurstMode = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_FB | ETH_DMABMR_MB); in HAL_ETH_GetDMAConfig()
2241 dmaconf->RxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_RDP); in HAL_ETH_GetDMAConfig()
2242 dmaconf->TxDMABurstLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_PBL); in HAL_ETH_GetDMAConfig()
2243 …dmaconf->EnhancedDescriptorFormat = ((READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_EDE) >> 7) > 0U)… in HAL_ETH_GetDMAConfig()
2244 dmaconf->DescriptorSkipLength = READ_BIT(heth->Instance->DMABMR, ETH_DMABMR_DSL) >> 2; in HAL_ETH_GetDMAConfig()
2821 (heth->Instance)->DMABMR = (uint32_t)(((uint32_t)dmaconf->AddressAlignedBeats << 25U) | in ETH_SetDMAConfig()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/src/Legacy/
Dstm32f7xx_hal_eth.c257 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
263 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
1760 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1771 tmpreg = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1773 (heth->Instance)->DMABMR = tmpreg; in HAL_ETH_ConfigDMA()
2063 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2074 tmpreg = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2076 (heth->Instance)->DMABMR = tmpreg; in ETH_MACDMAConfig()
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/src/Legacy/
Dstm32f4xx_hal_eth.c262 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
268 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
1759 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1770 tmpreg1 = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1772 (heth->Instance)->DMABMR = tmpreg1; in HAL_ETH_ConfigDMA()
2062 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2073 tmpreg1 = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2075 (heth->Instance)->DMABMR = tmpreg1; in ETH_MACDMAConfig()
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_eth.c258 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
264 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
1746 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1756 tmpreg1 = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1758 (heth->Instance)->DMABMR = tmpreg1; in HAL_ETH_ConfigDMA()
2046 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2056 tmpreg1 = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2058 (heth->Instance)->DMABMR = tmpreg1; in ETH_MACDMAConfig()
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_eth.c259 (heth->Instance)->DMABMR |= ETH_DMABMR_SR; in HAL_ETH_Init()
265 while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) in HAL_ETH_Init()
1753 (heth->Instance)->DMABMR = (uint32_t)(dmaconf->AddressAlignedBeats | in HAL_ETH_ConfigDMA()
1764 tmpreg1 = (heth->Instance)->DMABMR; in HAL_ETH_ConfigDMA()
1766 (heth->Instance)->DMABMR = tmpreg1; in HAL_ETH_ConfigDMA()
2056 (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | in ETH_MACDMAConfig()
2067 tmpreg1 = (heth->Instance)->DMABMR; in ETH_MACDMAConfig()
2069 (heth->Instance)->DMABMR = tmpreg1; in ETH_MACDMAConfig()
/hal_stm32-3.6.0/stm32cube/stm32f4xx/soc/
Dstm32f407xx.h421 __IO uint32_t DMABMR; member
Dstm32f427xx.h457 __IO uint32_t DMABMR; member
Dstm32f417xx.h420 __IO uint32_t DMABMR; member
Dstm32f437xx.h458 __IO uint32_t DMABMR; member
Dstm32f439xx.h460 __IO uint32_t DMABMR; member
Dstm32f429xx.h459 __IO uint32_t DMABMR; member
Dstm32f479xx.h543 __IO uint32_t DMABMR; member
Dstm32f469xx.h542 __IO uint32_t DMABMR; member
/hal_stm32-3.6.0/stm32cube/stm32f2xx/soc/
Dstm32f217xx.h420 __IO uint32_t DMABMR; member
Dstm32f207xx.h419 __IO uint32_t DMABMR; member
/hal_stm32-3.6.0/stm32cube/stm32f1xx/soc/
Dstm32f107xc.h432 __IO uint32_t DMABMR; member
/hal_stm32-3.6.0/stm32cube/stm32f7xx/soc/
Dstm32f746xx.h481 __IO uint32_t DMABMR; member
Dstm32f745xx.h479 __IO uint32_t DMABMR; member
Dstm32f765xx.h523 __IO uint32_t DMABMR; member
Dstm32f750xx.h482 __IO uint32_t DMABMR; member
Dstm32f756xx.h482 __IO uint32_t DMABMR; member
Dstm32f767xx.h526 __IO uint32_t DMABMR; member
Dstm32f777xx.h527 __IO uint32_t DMABMR; member
Dstm32f779xx.h528 __IO uint32_t DMABMR; member

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