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Searched refs:CRR0 (Results 1 – 25 of 33) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_icache.h520 SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_EnableRegion()
536 CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_DisableRegion()
552 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_IsEnabledRegion()
569 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionBaseAddress()
586 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionBaseAddress()
603 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionRemapAddress()
619 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionRemapAddress()
643 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionSize()
666 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionSize()
685 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionOutputBurstType()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_icache.h520 SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_EnableRegion()
536 CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_DisableRegion()
552 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_IsEnabledRegion()
570 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionBaseAddress()
588 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionBaseAddress()
606 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionRemapAddress()
623 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionRemapAddress()
647 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionSize()
670 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionSize()
689 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionOutputBurstType()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_icache.h525 SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_EnableRegion()
541 CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_DisableRegion()
557 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_IsEnabledRegion()
574 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionBaseAddress()
591 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionBaseAddress()
608 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionRemapAddress()
624 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionRemapAddress()
648 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionSize()
671 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionSize()
690 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionOutputBurstType()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_icache.h520 SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_EnableRegion()
536 CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_DisableRegion()
552 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_IsEnabledRegion()
569 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionBaseAddress()
586 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionBaseAddress()
603 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionRemapAddress()
619 return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionRemapAddress()
643 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionSize()
666 return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_GetRegionSize()
685 MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \ in LL_ICACHE_SetRegionOutputBurstType()
[all …]
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_icache.c211 WRITE_REG(ICACHE->CRR0, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos); in HAL_ICACHE_DeInit()
575 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_EnableRemapRegion()
626 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_DisableRemapRegion()
Dstm32wbaxx_ll_icache.c103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_icache.c577 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_EnableRemapRegion()
628 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_DisableRemapRegion()
Dstm32u5xx_ll_icache.c103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_icache.c582 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_EnableRemapRegion()
633 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_DisableRemapRegion()
Dstm32h5xx_ll_icache.c106 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()
/hal_stm32-3.6.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_icache.c577 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_EnableRemapRegion()
628 p_reg = &(ICACHE->CRR0) + (1U * Region); in HAL_ICACHE_DisableRemapRegion()
Dstm32l5xx_ll_icache.c103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()
/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h423 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32wba52xx.h514 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32wba54xx.h531 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32wba55xx.h531 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
/hal_stm32-3.6.0/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h735 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32l562xx.h769 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h586 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32u545xx.h625 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32u575xx.h639 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32u5f7xx.h824 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h721 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32h563xx.h899 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member
Dstm32h573xx.h937 __IO uint32_t CRR0; /*!< ICACHE region 0 configuration register, Address offset: 0x20 */ member

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