ADC_CFGR2_CKMODE_1 (reference) in projects: hal_stm32-3.6.0

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Searched refs:ADC_CFGR2_CKMODE_1 (Results 1 – 25 of 65) sorted by relevance

12 3

/hal_stm32-3.6.0/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_ll_adc.h	`454 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /… 456 #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /…`
D	stm32l0xx_hal_adc.h	`380 #define ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided …`
/hal_stm32-3.6.0/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_hal_adc.h	`288 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< ADC synchronous clock de…`
D	stm32f0xx_ll_adc.h	`381 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /*…`
/hal_stm32-3.6.0/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_adc.h	`552 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /… 554 #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /…`
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_ll_adc.h	`595 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /!< ADC synchronous clock derived … 599 #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /!< ADC synch…`
/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_adc.h	`533 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /… 535 #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /…`
/hal_stm32-3.6.0/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_ll_adc.h	`782 #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /… 784 #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /…`
/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/
D	stm32f070x6.h	`745 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 749 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f030x6.h	`700 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 704 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f030x8.h	`716 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 720 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f070xb.h	`768 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 772 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f030xc.h	`732 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 736 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f031x6.h	`710 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 714 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f038xx.h	`709 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 713 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f051x8.h	`816 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 820 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f058xx.h	`815 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 819 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f071xb.h	`850 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 854 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f042x6.h	`879 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 883 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f048xx.h	`879 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 883 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f072xb.h	`954 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 958 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f078xx.h	`954 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 958 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f098xx.h	`936 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 940 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
D	stm32f091xc.h	`936 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro 940 #define ADC_CFGR2_JITOFFDIV4 (ADC_CFGR2_CKMODE_1) /!< ADC clocked by PCLK div4 /`
/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/
D	stm32l051xx.h	`811 #define ADC_CFGR2_CKMODE_1 (0x2UL << ADC_CFGR2_CKMODE_Pos) /!< 0x80000000 / macro`

12 3

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
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