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Searched refs:p_queue (Results 1 – 3 of 3) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_xspi.c1424 DMA_QListTypeDef *p_queue = {NULL}; in HAL_XSPI_Transmit_DMA() local
1440 p_queue = hxspi->hdmatx->LinkedListQueue; in HAL_XSPI_Transmit_DMA()
1441 if ((p_queue != NULL) && (p_queue->Head != NULL)) in HAL_XSPI_Transmit_DMA()
1443 data_width = p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DDW_LOG2; in HAL_XSPI_Transmit_DMA()
1528 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET], \ in HAL_XSPI_Transmit_DMA()
1530 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR2_DEFAULT_OFFSET], \ in HAL_XSPI_Transmit_DMA()
1533 p_queue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = hxspi->XferSize; in HAL_XSPI_Transmit_DMA()
1535 p_queue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = (uint32_t)pData; in HAL_XSPI_Transmit_DMA()
1537 p_queue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)&hxspi->Instance->DR; in HAL_XSPI_Transmit_DMA()
1609 DMA_QListTypeDef *p_queue = {NULL}; in HAL_XSPI_Receive_DMA() local
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_ospi.c1406 DMA_QListTypeDef *p_queue = {NULL}; in HAL_OSPI_Transmit_DMA() local
1422 p_queue = hospi->hdma->LinkedListQueue; in HAL_OSPI_Transmit_DMA()
1423 if ((p_queue != NULL) && (p_queue->Head != NULL)) in HAL_OSPI_Transmit_DMA()
1425 data_width = p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DDW_LOG2; in HAL_OSPI_Transmit_DMA()
1510 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET], \ in HAL_OSPI_Transmit_DMA()
1512 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR2_DEFAULT_OFFSET], \ in HAL_OSPI_Transmit_DMA()
1515 p_queue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = hospi->XferSize; in HAL_OSPI_Transmit_DMA()
1517 p_queue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = (uint32_t)pData; in HAL_OSPI_Transmit_DMA()
1519 p_queue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)&hospi->Instance->DR; in HAL_OSPI_Transmit_DMA()
1588 DMA_QListTypeDef *p_queue = {NULL}; in HAL_OSPI_Receive_DMA() local
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Dstm32u5xx_hal_xspi.c1572 DMA_QListTypeDef *p_queue = {NULL}; in HAL_XSPI_Transmit_DMA() local
1588 p_queue = hxspi->hdmatx->LinkedListQueue; in HAL_XSPI_Transmit_DMA()
1589 if ((p_queue != NULL) && (p_queue->Head != NULL)) in HAL_XSPI_Transmit_DMA()
1591 data_width = p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_DDW_LOG2; in HAL_XSPI_Transmit_DMA()
1676 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET], \ in HAL_XSPI_Transmit_DMA()
1678 MODIFY_REG(p_queue->Head->LinkRegisters[NODE_CTR2_DEFAULT_OFFSET], \ in HAL_XSPI_Transmit_DMA()
1681 p_queue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = hxspi->XferSize; in HAL_XSPI_Transmit_DMA()
1683 p_queue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = (uint32_t)pData; in HAL_XSPI_Transmit_DMA()
1685 p_queue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)&hxspi->Instance->DR; in HAL_XSPI_Transmit_DMA()
1757 DMA_QListTypeDef *p_queue = {NULL}; in HAL_XSPI_Receive_DMA() local
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