1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_TIM_EX_H 21 #define STM32G4xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */ 73 } TIMEx_BreakInputConfigTypeDef; 74 75 /** 76 * @brief TIM Encoder index configuration 77 */ 78 typedef struct 79 { 80 uint32_t Polarity; /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ 81 82 uint32_t Prescaler; /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ 83 84 uint32_t Filter; /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 85 86 FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */ 87 88 uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ 89 90 uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ 91 92 } TIMEx_EncoderIndexConfigTypeDef; 93 94 /** 95 * @} 96 */ 97 /* End of exported types -----------------------------------------------------*/ 98 99 /* Exported constants --------------------------------------------------------*/ 100 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 101 * @{ 102 */ 103 104 /** @defgroup TIMEx_Remap TIM Extended Remapping 105 * @{ 106 */ 107 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 108 #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 109 #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 110 #define TIM_TIM1_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 111 #define TIM_TIM1_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 112 #if defined(COMP5) 113 #define TIM_TIM1_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 114 #endif /* COMP5 */ 115 #if defined(COMP6) 116 #define TIM_TIM1_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 117 #endif /* COMP6 */ 118 #if defined(COMP7) 119 #define TIM_TIM1_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 120 #endif /* COMP7 */ 121 #define TIM_TIM1_ETR_ADC1_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC1 analog watchdog 1 */ 122 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC1 analog watchdog 2 */ 123 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC1 analog watchdog 3 */ 124 #if defined (ADC4) 125 #define TIM_TIM1_ETR_ADC4_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC4 analog watchdog 1 */ 126 #define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC4 analog watchdog 2 */ 127 #define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC4 analog watchdog 3 */ 128 #endif /* ADC4 */ 129 130 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 131 #define TIM_TIM2_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 132 #define TIM_TIM2_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 133 #define TIM_TIM2_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 134 #define TIM_TIM2_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 135 #if defined(COMP5) 136 #define TIM_TIM2_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 137 #endif /* COMP5 */ 138 #if defined(COMP6) 139 #define TIM_TIM2_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 140 #endif /* COMP6 */ 141 #if defined(COMP7) 142 #define TIM_TIM2_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)/* !< ETR input is connected to COMP7_OUT */ 143 #endif /* COMP7 */ 144 #define TIM_TIM2_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM3 ETR */ 145 #define TIM_TIM2_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM4 ETR */ 146 #if defined (TIM5) 147 #define TIM_TIM2_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to TIM5 ETR */ 148 #endif /* TIM5 */ 149 #define TIM_TIM2_ETR_LSE (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to LSE */ 150 151 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 152 #define TIM_TIM3_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 153 #define TIM_TIM3_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 154 #define TIM_TIM3_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 155 #define TIM_TIM3_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 156 #if defined(COMP5) 157 #define TIM_TIM3_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 158 #endif /* COMP5 */ 159 #if defined(COMP6) 160 #define TIM_TIM3_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 161 #endif /* COMP6 */ 162 #if defined(COMP7) 163 #define TIM_TIM3_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 164 #endif /* COMP7 */ 165 #define TIM_TIM3_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM2 ETR */ 166 #define TIM_TIM3_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM4 ETR */ 167 #define TIM_TIM3_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 1 */ 168 #define TIM_TIM3_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC2 analog watchdog 2 */ 169 #define TIM_TIM3_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 3 */ 170 171 #define TIM_TIM4_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 172 #define TIM_TIM4_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 173 #define TIM_TIM4_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 174 #define TIM_TIM4_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 175 #define TIM_TIM4_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 176 #if defined(COMP5) 177 #define TIM_TIM4_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 178 #endif /* COMP5 */ 179 #if defined(COMP6) 180 #define TIM_TIM4_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 181 #endif /* COMP6 */ 182 #if defined(COMP7) 183 #define TIM_TIM4_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 184 #endif /* COMP7 */ 185 #define TIM_TIM4_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM3 ETR */ 186 #if defined (TIM5) 187 #define TIM_TIM4_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM5 ETR */ 188 #endif /* TIM5 */ 189 190 #if defined (TIM5) 191 #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 192 #define TIM_TIM5_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 193 #define TIM_TIM5_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 194 #define TIM_TIM5_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 195 #define TIM_TIM5_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 196 #if defined(COMP5) 197 #define TIM_TIM5_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 198 #endif /* COMP5 */ 199 #if defined(COMP6) 200 #define TIM_TIM5_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 201 #endif /* COMP6 */ 202 #if defined(COMP7) 203 #define TIM_TIM5_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 204 #endif /* COMP7 */ 205 #define TIM_TIM5_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM2 ETR */ 206 #define TIM_TIM5_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM3 ETR */ 207 #endif /* TIM5 */ 208 209 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 210 #define TIM_TIM8_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 211 #define TIM_TIM8_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 212 #define TIM_TIM8_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 213 #define TIM_TIM8_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 214 #if defined(COMP5) 215 #define TIM_TIM8_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 216 #endif /* COMP5 */ 217 #if defined(COMP6) 218 #define TIM_TIM8_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 219 #endif /* COMP6 */ 220 #if defined(COMP7) 221 #define TIM_TIM8_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 222 #endif /* COMP7 */ 223 #define TIM_TIM8_ETR_ADC2_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC2 analog watchdog 1 */ 224 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 2 */ 225 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC2 analog watchdog 3 */ 226 #if defined (ADC3) 227 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 1 */ 228 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC3 analog watchdog 2 */ 229 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 3 */ 230 #endif /* ADC3 */ 231 232 #if defined (TIM20) 233 #define TIM_TIM20_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */ 234 #define TIM_TIM20_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */ 235 #define TIM_TIM20_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */ 236 #define TIM_TIM20_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */ 237 #define TIM_TIM20_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */ 238 #if defined(COMP5) 239 #define TIM_TIM20_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */ 240 #endif /* COMP5 */ 241 #if defined(COMP6) 242 #define TIM_TIM20_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */ 243 #endif /* COMP6 */ 244 #if defined(COMP7) 245 #define TIM_TIM20_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */ 246 #endif /* COMP7 */ 247 #define TIM_TIM20_ETR_ADC3_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC3 analog watchdog 1 */ 248 #define TIM_TIM20_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 2 */ 249 #define TIM_TIM20_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC3 analog watchdog 3 */ 250 #if defined (ADC5) 251 #define TIM_TIM20_ETR_ADC5_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC5 analog watchdog 1 */ 252 #define TIM_TIM20_ETR_ADC5_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC5 analog watchdog 2 */ 253 #define TIM_TIM20_ETR_ADC5_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC5 analog watchdog 3 */ 254 #endif /* ADC5 */ 255 #endif /* TIM20 */ 256 /** 257 * @} 258 */ 259 260 /** @defgroup TIMEx_Break_Input TIM Extended Break input 261 * @{ 262 */ 263 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 264 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 265 /** 266 * @} 267 */ 268 269 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 270 * @{ 271 */ 272 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 273 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 274 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 275 #define TIM_BREAKINPUTSOURCE_COMP3 0x00000008U /* !< The COMP3 output is connected to the break input */ 276 #define TIM_BREAKINPUTSOURCE_COMP4 0x00000010U /* !< The COMP4 output is connected to the break input */ 277 #if defined(COMP5) 278 #define TIM_BREAKINPUTSOURCE_COMP5 0x00000020U /* !< The COMP5 output is connected to the break input */ 279 #endif /* COMP5 */ 280 #if defined(COMP6) 281 #define TIM_BREAKINPUTSOURCE_COMP6 0x00000040U /* !< The COMP6 output is connected to the break input */ 282 #endif /* COMP6 */ 283 #if defined(COMP7) 284 #define TIM_BREAKINPUTSOURCE_COMP7 0x00000080U /* !< The COMP7 output is connected to the break input */ 285 #endif /* COMP7 */ 286 /** 287 * @} 288 */ 289 290 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 291 * @{ 292 */ 293 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 294 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 295 /** 296 * @} 297 */ 298 299 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 300 * @{ 301 */ 302 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 303 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 304 /** 305 * @} 306 */ 307 308 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 309 * @{ 310 */ 311 #define TIM_TIM1_TI1_GPIO 0x00000000U /*!< TIM1 input 1 is connected to GPIO */ 312 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM1 input 1 is connected to COMP1_OUT */ 313 #define TIM_TIM1_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM1 input 1 is connected to COMP2_OUT */ 314 #define TIM_TIM1_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM1 input 1 is connected to COMP3_OUT */ 315 #define TIM_TIM1_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM1 input 1 is connected to COMP4_OUT */ 316 317 318 #define TIM_TIM2_TI1_GPIO 0x00000000U /*!< TIM2 input 1 is connected to GPIO */ 319 #define TIM_TIM2_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM2 input 1 is connected to COMP1_OUT */ 320 #define TIM_TIM2_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM2 input 1 is connected to COMP2_OUT */ 321 #define TIM_TIM2_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM2 input 1 is connected to COMP3_OUT */ 322 #define TIM_TIM2_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM2 input 1 is connected to COMP4_OUT */ 323 #if defined (COMP5) 324 #define TIM_TIM2_TI1_COMP5 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM2 input 1 is connected to COMP5_OUT */ 325 #endif /* COMP5 */ 326 327 #define TIM_TIM2_TI2_GPIO 0x00000000U /*!< TIM2 input 2 is connected to GPIO */ 328 #define TIM_TIM2_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM2 input 2 is connected to COMP1_OUT */ 329 #define TIM_TIM2_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM2 input 2 is connected to COMP2_OUT */ 330 #define TIM_TIM2_TI2_COMP3 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM2 input 2 is connected to COMP3_OUT */ 331 #define TIM_TIM2_TI2_COMP4 TIM_TISEL_TI2SEL_2 /*!< TIM2 input 2 is connected to COMP4_OUT */ 332 #if defined (COMP6) 333 #define TIM_TIM2_TI2_COMP6 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0) /*!< TIM2 input 2 is connected to COMP6_OUT */ 334 #endif /* COMP6 */ 335 336 #define TIM_TIM2_TI3_GPIO 0x00000000U /*!< TIM2 input 3 is connected to GPIO */ 337 #define TIM_TIM2_TI3_COMP4 TIM_TISEL_TI3SEL_0 /*!< TIM2 input 3 is connected to COMP4_OUT */ 338 339 #define TIM_TIM2_TI4_GPIO 0x00000000U /*!< TIM2 input 4 is connected to GPIO */ 340 #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /*!< TIM2 input 4 is connected to COMP1_OUT */ 341 #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /*!< TIM2 input 4 is connected to COMP2_OUT */ 342 343 344 #define TIM_TIM3_TI1_GPIO 0x00000000U /*!< TIM3 input 1 is connected to GPIO */ 345 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM3 input 1 is connected to COMP1_OUT */ 346 #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM3 input 1 is connected to COMP2_OUT */ 347 #define TIM_TIM3_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM3 input 1 is connected to COMP3_OUT */ 348 #define TIM_TIM3_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM3 input 1 is connected to COMP4_OUT */ 349 #if defined (COMP5) 350 #define TIM_TIM3_TI1_COMP5 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM3 input 1 is connected to COMP5_OUT */ 351 #endif /* COMP5 */ 352 #if defined (COMP6) 353 #define TIM_TIM3_TI1_COMP6 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM3 input 1 is connected to COMP6_OUT */ 354 #endif /* COMP6 */ 355 #if defined (COMP7) 356 #define TIM_TIM3_TI1_COMP7 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM3 input 1 is connected to COMP7_OUT */ 357 #endif /* COMP7 */ 358 359 #define TIM_TIM3_TI2_GPIO 0x00000000U /*!< TIM3 input 2 is connected to GPIO */ 360 #define TIM_TIM3_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM3 input 2 is connected to COMP1_OUT */ 361 #define TIM_TIM3_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM3 input 2 is connected to COMP2_OUT */ 362 #define TIM_TIM3_TI2_COMP3 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM3 input 2 is connected to COMP3_OUT */ 363 #define TIM_TIM3_TI2_COMP4 TIM_TISEL_TI2SEL_2 /*!< TIM3 input 2 is connected to COMP4_OUT */ 364 #if defined (COMP5) 365 #define TIM_TIM3_TI2_COMP5 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0) /*!< TIM3 input 2 is connected to COMP5_OUT */ 366 #endif /* COMP5 */ 367 #if defined (COMP6) 368 #define TIM_TIM3_TI2_COMP6 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1) /*!< TIM3 input 2 is connected to COMP6_OUT */ 369 #endif /* COMP6 */ 370 #if defined (COMP7) 371 #define TIM_TIM3_TI2_COMP7 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM3 input 2 is connected to COMP7_OUT */ 372 #endif /* COMP7 */ 373 374 #define TIM_TIM3_TI3_GPIO 0x00000000U /*!< TIM3 input 3 is connected to GPIO */ 375 #define TIM_TIM3_TI3_COMP3 TIM_TISEL_TI3SEL_0 /*!< TIM3 input 3 is connected to COMP3_OUT */ 376 377 378 #define TIM_TIM4_TI1_GPIO 0x00000000U /*!< TIM4 input 1 is connected to GPIO */ 379 #define TIM_TIM4_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM4 input 1 is connected to COMP1_OUT */ 380 #define TIM_TIM4_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM4 input 1 is connected to COMP2_OUT */ 381 #define TIM_TIM4_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM4 input 1 is connected to COMP3_OUT */ 382 #define TIM_TIM4_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM4 input 1 is connected to COMP4_OUT */ 383 #if defined (COMP5) 384 #define TIM_TIM4_TI1_COMP5 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM4 input 1 is connected to COMP5_OUT */ 385 #endif /* COMP5 */ 386 #if defined (COMP6) 387 #define TIM_TIM4_TI1_COMP6 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM4 input 1 is connected to COMP6_OUT */ 388 #endif /* COMP6 */ 389 #if defined (COMP7) 390 #define TIM_TIM4_TI1_COMP7 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM4 input 1 is connected to COMP7_OUT */ 391 #endif /* COMP7 */ 392 393 #define TIM_TIM4_TI2_GPIO 0x00000000U /*!< TIM4 input 2 is connected to GPIO */ 394 #define TIM_TIM4_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM4 input 2 is connected to COMP1_OUT */ 395 #define TIM_TIM4_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM4 input 2 is connected to COMP2_OUT */ 396 #define TIM_TIM4_TI2_COMP3 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM4 input 2 is connected to COMP3_OUT */ 397 #define TIM_TIM4_TI2_COMP4 TIM_TISEL_TI2SEL_2 /*!< TIM4 input 2 is connected to COMP4_OUT */ 398 #if defined (COMP5) 399 #define TIM_TIM4_TI2_COMP5 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0) /*!< TIM4 input 2 is connected to COMP5_OUT */ 400 #endif /* COMP5 */ 401 #if defined (COMP6) 402 #define TIM_TIM4_TI2_COMP6 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1) /*!< TIM4 input 2 is connected to COMP6_OUT */ 403 #endif /* COMP6 */ 404 #if defined (COMP7) 405 #define TIM_TIM4_TI2_COMP7 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM4 input 2 is connected to COMP7_OUT */ 406 #endif /* COMP7 */ 407 408 #define TIM_TIM4_TI3_GPIO 0x00000000U /*!< TIM4 input 3 is connected to GPIO */ 409 #if defined (COMP5) 410 #define TIM_TIM4_TI3_COMP5 TIM_TISEL_TI3SEL_0 /*!< TIM4 input 3 is connected to COMP5_OUT */ 411 #endif /* COMP5 */ 412 413 #define TIM_TIM4_TI4_GPIO 0x00000000U /*!< TIM4 input 4 is connected to GPIO */ 414 #if defined (COMP6) 415 #define TIM_TIM4_TI4_COMP6 TIM_TISEL_TI4SEL_0 /*!< TIM4 input 4 is connected to COMP6_OUT */ 416 #endif /* COMP6 */ 417 418 419 #if defined(TIM5) 420 #define TIM_TIM5_TI1_GPIO 0x00000000U /*!< TIM5 input 1 is connected to GPIO */ 421 #define TIM_TIM5_TI1_LSI TIM_TISEL_TI1SEL_0 /*!< TIM5 input 1 is connected to LSI */ 422 #define TIM_TIM5_TI1_LSE TIM_TISEL_TI1SEL_1 /*!< TIM5 input 1 is connected to LSE */ 423 #define TIM_TIM5_TI1_RTC_WK (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM5 input 1 is connected to RTC_WAKEUP */ 424 #define TIM_TIM5_TI1_COMP1 TIM_TISEL_TI1SEL_2 /*!< TIM5 input 1 is connected to COMP1_OUT */ 425 #define TIM_TIM5_TI1_COMP2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM5 input 1 is connected to COMP2_OUT */ 426 #define TIM_TIM5_TI1_COMP3 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM5 input 1 is connected to COMP3_OUT */ 427 #define TIM_TIM5_TI1_COMP4 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM5 input 1 is connected to COMP4_OUT */ 428 #if defined(COMP5) 429 #define TIM_TIM5_TI1_COMP5 TIM_TISEL_TI1SEL_3 /*!< TIM5 input 1 is connected to COMP5_OUT */ 430 #endif /* COMP5 */ 431 #if defined(COMP6) 432 #define TIM_TIM5_TI1_COMP6 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /*!< TIM5 input 1 is connected to COMP6_OUT */ 433 #endif /* COMP6 */ 434 #if defined(COMP7) 435 #define TIM_TIM5_TI1_COMP7 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_1) /*!< TIM5 input 1 is connected to COMP7_OUT */ 436 #endif /* COMP7 */ 437 438 #define TIM_TIM5_TI2_GPIO 0x00000000U /*!< TIM5 input 2 is connected to GPIO */ 439 #define TIM_TIM5_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM5 input 2 is connected to COMP1_OUT */ 440 #define TIM_TIM5_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM5 input 2 is connected to COMP2_OUT */ 441 #define TIM_TIM5_TI2_COMP3 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM5 input 2 is connected to COMP3_OUT */ 442 #define TIM_TIM5_TI2_COMP4 TIM_TISEL_TI2SEL_2 /*!< TIM5 input 2 is connected to COMP4_OUT */ 443 #if defined(COMP5) 444 #define TIM_TIM5_TI2_COMP5 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0) /*!< TIM5 input 2 is connected to COMP5_OUT */ 445 #endif /* COMP5 */ 446 #if defined(COMP6) 447 #define TIM_TIM5_TI2_COMP6 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1) /*!< TIM5 input 2 is connected to COMP6_OUT */ 448 #endif /* COMP6 */ 449 #if defined(COMP7) 450 #define TIM_TIM5_TI2_COMP7 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM5 input 2 is connected to COMP7_OUT */ 451 #endif /* COMP7 */ 452 #endif /* TIM5 */ 453 454 455 #define TIM_TIM8_TI1_GPIO 0x00000000U /*!< TIM8 input 1 is connected to GPIO */ 456 #define TIM_TIM8_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM8 input 1 is connected to COMP1_OUT */ 457 #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM8 input 1 is connected to COMP2_OUT */ 458 #define TIM_TIM8_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM8 input 1 is connected to COMP3_OUT */ 459 #define TIM_TIM8_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM8 input 1 is connected to COMP4_OUT */ 460 461 462 #define TIM_TIM15_TI1_GPIO 0x00000000U /*!< TIM15 input 1 is connected to GPIO */ 463 #define TIM_TIM15_TI1_LSE TIM_TISEL_TI1SEL_0 /*!< TIM15 input 1 is connected to LSE */ 464 #define TIM_TIM15_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM15 input 1 is connected to COMP1_OUT */ 465 #define TIM_TIM15_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM15 input 1 is connected to COMP2_OUT */ 466 #if defined (COMP5) 467 #define TIM_TIM15_TI1_COMP5 TIM_TISEL_TI1SEL_2 /*!< TIM15 input 1 is connected to COMP5_OUT */ 468 #endif /* COMP5 */ 469 #if defined(COMP7) 470 #define TIM_TIM15_TI1_COMP7 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM15 input 1 is connected to COMP7_OUT */ 471 #endif /* COMP7 */ 472 473 #define TIM_TIM15_TI2_GPIO 0x00000000U /*!< TIM15 input 2 is connected to GPIO */ 474 #define TIM_TIM15_TI2_COMP2 TIM_TISEL_TI2SEL_0 /*!< TIM15 input 2 is connected to COMP2_OUT */ 475 #define TIM_TIM15_TI2_COMP3 TIM_TISEL_TI2SEL_1 /*!< TIM15 input 2 is connected to COMP3_OUT */ 476 #if defined (COMP6) 477 #define TIM_TIM15_TI2_COMP6 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM15 input 2 is connected to COMP6_OUT */ 478 #endif /* COMP6 */ 479 #if defined(COMP7) 480 #define TIM_TIM15_TI2_COMP7 TIM_TISEL_TI2SEL_2 /*!< TIM15 input 2 is connected to COMP7_OUT */ 481 #endif /* COMP7 */ 482 483 484 #define TIM_TIM16_TI1_GPIO 0x00000000U /*!< TIM16 input 1 is connected to GPIO */ 485 #if defined (COMP6) 486 #define TIM_TIM16_TI1_COMP6 TIM_TISEL_TI1SEL_0 /*!< TIM16 input 1 is connected to COMP6_OUT */ 487 #endif /* COMP6 */ 488 #define TIM_TIM16_TI1_MCO TIM_TISEL_TI1SEL_1 /*!< TIM16 input 1 is connected to MCO */ 489 #define TIM_TIM16_TI1_HSE_32 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM16 input 1 is connected to HSE/32 */ 490 #define TIM_TIM16_TI1_RTC_WK TIM_TISEL_TI1SEL_2 /*!< TIM16 input 1 is connected to RTC_WAKEUP */ 491 #define TIM_TIM16_TI1_LSE (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM16 input 1 is connected to LSE */ 492 #define TIM_TIM16_TI1_LSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM16 input 1 is connected to LSI */ 493 494 495 #define TIM_TIM17_TI1_GPIO 0x00000000U /*!< TIM17 input 1 is connected to GPIO */ 496 #if defined (COMP5) 497 #define TIM_TIM17_TI1_COMP5 TIM_TISEL_TI1SEL_0 /*!< TIM17 input 1 is connected to COMP5_OUT */ 498 #endif /* COMP5 */ 499 #define TIM_TIM17_TI1_MCO TIM_TISEL_TI1SEL_1 /*!< TIM17 input 1 is connected to MCO */ 500 #define TIM_TIM17_TI1_HSE_32 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM17 input 1 is connected to HSE/32 */ 501 #define TIM_TIM17_TI1_RTC_WK TIM_TISEL_TI1SEL_2 /*!< TIM17 input 1 is connected to RTC_WAKEUP */ 502 #define TIM_TIM17_TI1_LSE (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM17 input 1 is connected to LSE */ 503 #define TIM_TIM17_TI1_LSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM17 input 1 is connected to LSI */ 504 505 506 #if defined (TIM20) 507 #define TIM_TIM20_TI1_GPIO 0x00000000U /*!< TIM20 input 1 is connected to GPIO */ 508 #define TIM_TIM20_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM20 input 1 is connected to COMP1_OUT */ 509 #define TIM_TIM20_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM20 input 1 is connected to COMP2_OUT */ 510 #define TIM_TIM20_TI1_COMP3 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM20 input 1 is connected to COMP3_OUT */ 511 #define TIM_TIM20_TI1_COMP4 TIM_TISEL_TI1SEL_2 /*!< TIM20 input 1 is connected to COMP4_OUT */ 512 #endif /* TIM20 */ 513 /** 514 * @} 515 */ 516 517 /** @defgroup TIMEx_SMS_Preload_Enable TIM Extended Bitfield SMS preload enabling 518 * @{ 519 */ 520 #define TIM_SMS_PRELOAD_SOURCE_UPDATE 0x00000000U /*!< Prelaod of SMS bitfield is disabled */ 521 #define TIM_SMS_PRELOAD_SOURCE_INDEX TIM_SMCR_SMSPS /*!< Preload of SMS bitfield is enabled */ 522 /** 523 * @} 524 */ 525 526 /** @defgroup TIMEx_Encoder_Index_Position TIM Extended Encoder index position 527 * @{ 528 */ 529 #define TIM_ENCODERINDEX_POSITION_00 0x00000000U /*!< Encoder index position is AB=00 */ 530 #define TIM_ENCODERINDEX_POSITION_01 TIM_ECR_IPOS_0 /*!< Encoder index position is AB=01 */ 531 #define TIM_ENCODERINDEX_POSITION_10 TIM_ECR_IPOS_1 /*!< Encoder index position is AB=10 */ 532 #define TIM_ENCODERINDEX_POSITION_11 (TIM_ECR_IPOS_1 | TIM_ECR_IPOS_0) /*!< Encoder index position is AB=11 */ 533 #define TIM_ENCODERINDEX_POSITION_0 0x00000000U /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 0 */ 534 #define TIM_ENCODERINDEX_POSITION_1 TIM_ECR_IPOS_0 /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 1 */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup TIMEx_Encoder_Index_Direction TIM Extended Encoder index direction 540 * @{ 541 */ 542 #define TIM_ENCODERINDEX_DIRECTION_UP_DOWN 0x00000000U /*!< Index resets the counter whatever the direction */ 543 #define TIM_ENCODERINDEX_DIRECTION_UP TIM_ECR_IDIR_0 /*!< Index resets the counter when up-counting only */ 544 #define TIM_ENCODERINDEX_DIRECTION_DOWN TIM_ECR_IDIR_1 /*!< Index resets the counter when down-counting only */ 545 /** 546 * @} 547 */ 548 549 /** @defgroup TIMEx_Encoder_Index_Polarity TIM Extended Encoder index polarity 550 * @{ 551 */ 552 #define TIM_ENCODERINDEX_POLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ 553 #define TIM_ENCODERINDEX_POLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ 554 /** 555 * @} 556 */ 557 558 /** @defgroup TIMEx_Encoder_Index_Prescaler TIM Extended Encodder index prescaler 559 * @{ 560 */ 561 #define TIM_ENCODERINDEX_PRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ 562 #define TIM_ENCODERINDEX_PRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ 563 #define TIM_ENCODERINDEX_PRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ 564 #define TIM_ENCODERINDEX_PRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ 565 /** 566 * @} 567 */ 568 569 /** 570 * @} 571 */ 572 /* End of exported constants -------------------------------------------------*/ 573 574 /* Exported macro ------------------------------------------------------------*/ 575 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 576 * @{ 577 */ 578 579 /** 580 * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. 581 * @note ex: @ref __HAL_TIM_CALC_PSC(80000000, 1000000); 582 * @param __TIMCLK__ timer input clock frequency (in Hz) 583 * @param __CNTCLK__ counter clock frequency (in Hz) 584 * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 585 */ 586 #define __HAL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 587 ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U 588 589 /** 590 * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency. 591 * @note ex: @ref __HAL_TIM_CALC_PERIOD(1000000, 0, 10000); 592 * @param __TIMCLK__ timer input clock frequency (in Hz) 593 * @param __PSC__ prescaler 594 * @param __FREQ__ output signal frequency (in Hz) 595 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 596 */ 597 #define __HAL_TIM_CALC_PERIOD(__TIMCLK__, __PSC__, __FREQ__) \ 598 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U 599 600 /** 601 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 602 * output signal frequency. 603 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000); 604 * @note This macro should be used only if dithering is already enabled 605 * @param __TIMCLK__ timer input clock frequency (in Hz) 606 * @param __PSC__ prescaler 607 * @param __FREQ__ output signal frequency (in Hz) 608 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 609 */ 610 #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ 611 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ 612 (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U 613 614 /** 615 * @brief HELPER macro calculating the compare value required to achieve the required timer output compare 616 * active/inactive delay. 617 * @note ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10); 618 * @param __TIMCLK__ timer input clock frequency (in Hz) 619 * @param __PSC__ prescaler 620 * @param __DELAY__ timer output compare active/inactive delay (in us) 621 * @retval Compare value (between Min_Data=0 and Max_Data=65535) 622 */ 623 #define __HAL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__) \ 624 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 625 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 626 627 /** 628 * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer 629 * output compare active/inactive delay. 630 * @note ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10); 631 * @note This macro should be used only if dithering is already enabled 632 * @param __TIMCLK__ timer input clock frequency (in Hz) 633 * @param __PSC__ prescaler 634 * @param __DELAY__ timer output compare active/inactive delay (in us) 635 * @retval Compare value (between Min_Data=0 and Max_Data=65519) 636 */ 637 #define __HAL_TIM_CALC_PULSE_DITHER(__TIMCLK__, __PSC__, __DELAY__) \ 638 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__) * 16U) \ 639 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 640 641 /** 642 * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration 643 * (when the timer operates in one pulse mode). 644 * @note ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20); 645 * @param __TIMCLK__ timer input clock frequency (in Hz) 646 * @param __PSC__ prescaler 647 * @param __DELAY__ timer output compare active/inactive delay (in us) 648 * @param __PULSE__ pulse duration (in us) 649 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 650 */ 651 #define __HAL_TIM_CALC_PERIOD_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 652 ((uint32_t)(__HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__PULSE__)) \ 653 + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__)))) 654 655 /** 656 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 657 * pulse duration (when the timer operates in one pulse mode). 658 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20); 659 * @note This macro should be used only if dithering is already enabled 660 * @param __TIMCLK__ timer input clock frequency (in Hz) 661 * @param __PSC__ prescaler 662 * @param __DELAY__ timer output compare active/inactive delay (in us) 663 * @param __PULSE__ pulse duration (in us) 664 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 665 */ 666 #define __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 667 ((uint32_t)(__HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__PULSE__)) \ 668 + __HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__DELAY__)))) 669 670 /** 671 * @} 672 */ 673 /* End of exported macro -----------------------------------------------------*/ 674 675 /* Private macro -------------------------------------------------------------*/ 676 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 677 * @{ 678 */ 679 #define IS_TIM_REMAP(__REMAP__) ((((__REMAP__) & 0xFFFC3FFFU) == 0x00000000U)) 680 681 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 682 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 683 684 #if defined (COMP5) && defined (COMP6) && defined (COMP7) 685 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 686 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 687 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 688 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP3) || \ 689 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP4) || \ 690 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP5) || \ 691 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP6) || \ 692 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP7)) 693 694 695 #else 696 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 697 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 698 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 699 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP3) || \ 700 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP4)) 701 702 #endif /* COMP5 && COMP6 && COMP7 */ 703 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 704 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 705 706 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 707 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 708 709 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U)) 710 711 #define IS_TIM_TISEL_TIX_INSTANCE(INSTANCE, CHANNEL) \ 712 (IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) && ((CHANNEL) < TIM_CHANNEL_5)) 713 714 #if defined(TIM5) && defined(TIM20) 715 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 716 ((((INSTANCE) == TIM1) && \ 717 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 718 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 719 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 720 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 721 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 722 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 723 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 724 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 725 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 726 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 727 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 728 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 729 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 730 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 731 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 732 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 733 || \ 734 (((INSTANCE) == TIM2) && \ 735 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 736 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 737 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 738 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 739 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 740 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 741 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 742 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 743 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 744 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 745 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 746 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 747 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 748 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 749 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 750 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 751 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 752 || \ 753 (((INSTANCE) == TIM3) && \ 754 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 755 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 756 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 757 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 758 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 759 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 760 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 761 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 762 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 763 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 764 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 765 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 766 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 767 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 768 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 769 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 770 || \ 771 (((INSTANCE) == TIM4) && \ 772 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 773 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 774 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 775 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 776 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 777 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 778 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 779 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 780 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 781 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 782 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 783 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 784 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 785 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 786 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 787 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 788 || \ 789 (((INSTANCE) == TIM5) && \ 790 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 791 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 792 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 793 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 794 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 795 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 796 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 797 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 798 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 799 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 800 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 801 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 802 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 803 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 804 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 805 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 806 || \ 807 (((INSTANCE) == TIM8) && \ 808 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 809 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 810 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 811 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 812 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 813 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 814 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 815 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 816 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 817 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 818 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 819 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 820 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 821 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 822 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 823 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 824 || \ 825 (((INSTANCE) == TIM15) && \ 826 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 827 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 828 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 829 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 830 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 831 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 832 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 833 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 834 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 835 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 836 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 837 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 838 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 839 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10))) \ 840 || \ 841 (((INSTANCE) == TIM20) && \ 842 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 843 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 844 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 845 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 846 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 847 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 848 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 849 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 850 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 851 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 852 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 853 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 854 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 855 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 856 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 857 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10)))) 858 859 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 860 ((((INSTANCE) == TIM1) && \ 861 (((__SELECTION__) == TIM_TS_ITR1) || \ 862 ((__SELECTION__) == TIM_TS_ITR2) || \ 863 ((__SELECTION__) == TIM_TS_ITR3) || \ 864 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 865 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 866 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 867 ((__SELECTION__) == TIM_TS_ETRF) || \ 868 ((__SELECTION__) == TIM_TS_ITR4) || \ 869 ((__SELECTION__) == TIM_TS_ITR5) || \ 870 ((__SELECTION__) == TIM_TS_ITR6) || \ 871 ((__SELECTION__) == TIM_TS_ITR7) || \ 872 ((__SELECTION__) == TIM_TS_ITR8) || \ 873 ((__SELECTION__) == TIM_TS_ITR9) || \ 874 ((__SELECTION__) == TIM_TS_ITR10))) \ 875 || \ 876 (((INSTANCE) == TIM2) && \ 877 (((__SELECTION__) == TIM_TS_ITR0) || \ 878 ((__SELECTION__) == TIM_TS_ITR2) || \ 879 ((__SELECTION__) == TIM_TS_ITR3) || \ 880 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 881 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 882 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 883 ((__SELECTION__) == TIM_TS_ETRF) || \ 884 ((__SELECTION__) == TIM_TS_ITR4) || \ 885 ((__SELECTION__) == TIM_TS_ITR5) || \ 886 ((__SELECTION__) == TIM_TS_ITR6) || \ 887 ((__SELECTION__) == TIM_TS_ITR7) || \ 888 ((__SELECTION__) == TIM_TS_ITR8) || \ 889 ((__SELECTION__) == TIM_TS_ITR9) || \ 890 ((__SELECTION__) == TIM_TS_ITR10) || \ 891 ((__SELECTION__) == TIM_TS_ITR11))) \ 892 || \ 893 (((INSTANCE) == TIM3) && \ 894 (((__SELECTION__) == TIM_TS_ITR0) || \ 895 ((__SELECTION__) == TIM_TS_ITR1) || \ 896 ((__SELECTION__) == TIM_TS_ITR3) || \ 897 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 898 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 899 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 900 ((__SELECTION__) == TIM_TS_ETRF) || \ 901 ((__SELECTION__) == TIM_TS_ITR4) || \ 902 ((__SELECTION__) == TIM_TS_ITR5) || \ 903 ((__SELECTION__) == TIM_TS_ITR6) || \ 904 ((__SELECTION__) == TIM_TS_ITR7) || \ 905 ((__SELECTION__) == TIM_TS_ITR8) || \ 906 ((__SELECTION__) == TIM_TS_ITR9) || \ 907 ((__SELECTION__) == TIM_TS_ITR10))) \ 908 || \ 909 (((INSTANCE) == TIM4) && \ 910 (((__SELECTION__) == TIM_TS_ITR0) || \ 911 ((__SELECTION__) == TIM_TS_ITR1) || \ 912 ((__SELECTION__) == TIM_TS_ITR2) || \ 913 ((__SELECTION__) == TIM_TS_ITR4) || \ 914 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 915 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 916 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 917 ((__SELECTION__) == TIM_TS_ETRF) || \ 918 ((__SELECTION__) == TIM_TS_ITR5) || \ 919 ((__SELECTION__) == TIM_TS_ITR6) || \ 920 ((__SELECTION__) == TIM_TS_ITR7) || \ 921 ((__SELECTION__) == TIM_TS_ITR8) || \ 922 ((__SELECTION__) == TIM_TS_ITR9) || \ 923 ((__SELECTION__) == TIM_TS_ITR10))) \ 924 || \ 925 (((INSTANCE) == TIM5) && \ 926 (((__SELECTION__) == TIM_TS_ITR0) || \ 927 ((__SELECTION__) == TIM_TS_ITR1) || \ 928 ((__SELECTION__) == TIM_TS_ITR2) || \ 929 ((__SELECTION__) == TIM_TS_ITR3) || \ 930 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 931 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 932 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 933 ((__SELECTION__) == TIM_TS_ETRF) || \ 934 ((__SELECTION__) == TIM_TS_ITR5) || \ 935 ((__SELECTION__) == TIM_TS_ITR6) || \ 936 ((__SELECTION__) == TIM_TS_ITR7) || \ 937 ((__SELECTION__) == TIM_TS_ITR8) || \ 938 ((__SELECTION__) == TIM_TS_ITR9) || \ 939 ((__SELECTION__) == TIM_TS_ITR10))) \ 940 || \ 941 (((INSTANCE) == TIM8) && \ 942 (((__SELECTION__) == TIM_TS_ITR0) || \ 943 ((__SELECTION__) == TIM_TS_ITR1) || \ 944 ((__SELECTION__) == TIM_TS_ITR2) || \ 945 ((__SELECTION__) == TIM_TS_ITR3) || \ 946 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 947 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 948 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 949 ((__SELECTION__) == TIM_TS_ETRF) || \ 950 ((__SELECTION__) == TIM_TS_ITR4) || \ 951 ((__SELECTION__) == TIM_TS_ITR6) || \ 952 ((__SELECTION__) == TIM_TS_ITR7) || \ 953 ((__SELECTION__) == TIM_TS_ITR8) || \ 954 ((__SELECTION__) == TIM_TS_ITR9) || \ 955 ((__SELECTION__) == TIM_TS_ITR10))) \ 956 || \ 957 (((INSTANCE) == TIM15) && \ 958 (((__SELECTION__) == TIM_TS_ITR0) || \ 959 ((__SELECTION__) == TIM_TS_ITR1) || \ 960 ((__SELECTION__) == TIM_TS_ITR2) || \ 961 ((__SELECTION__) == TIM_TS_ITR3) || \ 962 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 963 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 964 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 965 ((__SELECTION__) == TIM_TS_ITR4) || \ 966 ((__SELECTION__) == TIM_TS_ITR5) || \ 967 ((__SELECTION__) == TIM_TS_ITR7) || \ 968 ((__SELECTION__) == TIM_TS_ITR8) || \ 969 ((__SELECTION__) == TIM_TS_ITR9) || \ 970 ((__SELECTION__) == TIM_TS_ITR10))) \ 971 || \ 972 (((INSTANCE) == TIM20) && \ 973 (((__SELECTION__) == TIM_TS_ITR0) || \ 974 ((__SELECTION__) == TIM_TS_ITR1) || \ 975 ((__SELECTION__) == TIM_TS_ITR2) || \ 976 ((__SELECTION__) == TIM_TS_ITR3) || \ 977 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 978 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 979 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 980 ((__SELECTION__) == TIM_TS_ETRF) || \ 981 ((__SELECTION__) == TIM_TS_ITR4) || \ 982 ((__SELECTION__) == TIM_TS_ITR5) || \ 983 ((__SELECTION__) == TIM_TS_ITR6) || \ 984 ((__SELECTION__) == TIM_TS_ITR7) || \ 985 ((__SELECTION__) == TIM_TS_ITR8) || \ 986 ((__SELECTION__) == TIM_TS_ITR10)))) 987 988 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 989 ((((INSTANCE) == TIM1) && \ 990 (((__SELECTION__) == TIM_TS_ITR1) || \ 991 ((__SELECTION__) == TIM_TS_ITR2) || \ 992 ((__SELECTION__) == TIM_TS_ITR3) || \ 993 ((__SELECTION__) == TIM_TS_ITR4) || \ 994 ((__SELECTION__) == TIM_TS_ITR5) || \ 995 ((__SELECTION__) == TIM_TS_ITR6) || \ 996 ((__SELECTION__) == TIM_TS_ITR7) || \ 997 ((__SELECTION__) == TIM_TS_ITR8) || \ 998 ((__SELECTION__) == TIM_TS_ITR9) || \ 999 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1000 ((__SELECTION__) == TIM_TS_NONE))) \ 1001 || \ 1002 (((INSTANCE) == TIM2) && \ 1003 (((__SELECTION__) == TIM_TS_ITR0) || \ 1004 ((__SELECTION__) == TIM_TS_ITR2) || \ 1005 ((__SELECTION__) == TIM_TS_ITR3) || \ 1006 ((__SELECTION__) == TIM_TS_ITR4) || \ 1007 ((__SELECTION__) == TIM_TS_ITR5) || \ 1008 ((__SELECTION__) == TIM_TS_ITR6) || \ 1009 ((__SELECTION__) == TIM_TS_ITR7) || \ 1010 ((__SELECTION__) == TIM_TS_ITR8) || \ 1011 ((__SELECTION__) == TIM_TS_ITR9) || \ 1012 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1013 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1014 ((__SELECTION__) == TIM_TS_NONE))) \ 1015 || \ 1016 (((INSTANCE) == TIM3) && \ 1017 (((__SELECTION__) == TIM_TS_ITR0) || \ 1018 ((__SELECTION__) == TIM_TS_ITR1) || \ 1019 ((__SELECTION__) == TIM_TS_ITR3) || \ 1020 ((__SELECTION__) == TIM_TS_ITR4) || \ 1021 ((__SELECTION__) == TIM_TS_ITR5) || \ 1022 ((__SELECTION__) == TIM_TS_ITR6) || \ 1023 ((__SELECTION__) == TIM_TS_ITR7) || \ 1024 ((__SELECTION__) == TIM_TS_ITR8) || \ 1025 ((__SELECTION__) == TIM_TS_ITR9) || \ 1026 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1027 ((__SELECTION__) == TIM_TS_NONE))) \ 1028 || \ 1029 (((INSTANCE) == TIM4) && \ 1030 (((__SELECTION__) == TIM_TS_ITR0) || \ 1031 ((__SELECTION__) == TIM_TS_ITR1) || \ 1032 ((__SELECTION__) == TIM_TS_ITR2) || \ 1033 ((__SELECTION__) == TIM_TS_ITR4) || \ 1034 ((__SELECTION__) == TIM_TS_ITR5) || \ 1035 ((__SELECTION__) == TIM_TS_ITR6) || \ 1036 ((__SELECTION__) == TIM_TS_ITR7) || \ 1037 ((__SELECTION__) == TIM_TS_ITR8) || \ 1038 ((__SELECTION__) == TIM_TS_ITR9) || \ 1039 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1040 ((__SELECTION__) == TIM_TS_NONE))) \ 1041 || \ 1042 (((INSTANCE) == TIM5) && \ 1043 (((__SELECTION__) == TIM_TS_ITR0) || \ 1044 ((__SELECTION__) == TIM_TS_ITR1) || \ 1045 ((__SELECTION__) == TIM_TS_ITR2) || \ 1046 ((__SELECTION__) == TIM_TS_ITR3) || \ 1047 ((__SELECTION__) == TIM_TS_ITR5) || \ 1048 ((__SELECTION__) == TIM_TS_ITR6) || \ 1049 ((__SELECTION__) == TIM_TS_ITR7) || \ 1050 ((__SELECTION__) == TIM_TS_ITR8) || \ 1051 ((__SELECTION__) == TIM_TS_ITR9) || \ 1052 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1053 ((__SELECTION__) == TIM_TS_NONE))) \ 1054 || \ 1055 (((INSTANCE) == TIM8) && \ 1056 (((__SELECTION__) == TIM_TS_ITR0) || \ 1057 ((__SELECTION__) == TIM_TS_ITR1) || \ 1058 ((__SELECTION__) == TIM_TS_ITR2) || \ 1059 ((__SELECTION__) == TIM_TS_ITR3) || \ 1060 ((__SELECTION__) == TIM_TS_ITR4) || \ 1061 ((__SELECTION__) == TIM_TS_ITR6) || \ 1062 ((__SELECTION__) == TIM_TS_ITR7) || \ 1063 ((__SELECTION__) == TIM_TS_ITR8) || \ 1064 ((__SELECTION__) == TIM_TS_ITR9) || \ 1065 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1066 ((__SELECTION__) == TIM_TS_NONE))) \ 1067 || \ 1068 (((INSTANCE) == TIM15) && \ 1069 (((__SELECTION__) == TIM_TS_ITR0) || \ 1070 ((__SELECTION__) == TIM_TS_ITR1) || \ 1071 ((__SELECTION__) == TIM_TS_ITR2) || \ 1072 ((__SELECTION__) == TIM_TS_ITR3) || \ 1073 ((__SELECTION__) == TIM_TS_ITR4) || \ 1074 ((__SELECTION__) == TIM_TS_ITR5) || \ 1075 ((__SELECTION__) == TIM_TS_ITR7) || \ 1076 ((__SELECTION__) == TIM_TS_ITR8) || \ 1077 ((__SELECTION__) == TIM_TS_ITR9) || \ 1078 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1079 ((__SELECTION__) == TIM_TS_NONE))) \ 1080 || \ 1081 (((INSTANCE) == TIM20) && \ 1082 (((__SELECTION__) == TIM_TS_ITR0) || \ 1083 ((__SELECTION__) == TIM_TS_ITR1) || \ 1084 ((__SELECTION__) == TIM_TS_ITR2) || \ 1085 ((__SELECTION__) == TIM_TS_ITR3) || \ 1086 ((__SELECTION__) == TIM_TS_ITR4) || \ 1087 ((__SELECTION__) == TIM_TS_ITR5) || \ 1088 ((__SELECTION__) == TIM_TS_ITR6) || \ 1089 ((__SELECTION__) == TIM_TS_ITR7) || \ 1090 ((__SELECTION__) == TIM_TS_ITR8) || \ 1091 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1092 ((__SELECTION__) == TIM_TS_NONE)))) 1093 1094 #elif defined(TIM5) 1095 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 1096 ((((INSTANCE) == TIM1) && \ 1097 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1098 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1099 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1100 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1101 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1102 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1103 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1104 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1105 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1106 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1107 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1108 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1109 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1110 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1111 || \ 1112 (((INSTANCE) == TIM2) && \ 1113 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1114 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1115 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1116 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1117 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1118 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1119 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1120 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1121 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1122 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1123 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1124 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1125 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1126 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1127 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 1128 || \ 1129 (((INSTANCE) == TIM3) && \ 1130 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1131 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1132 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1133 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1134 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1135 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1136 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1137 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1138 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1139 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1140 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1141 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1142 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1143 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1144 || \ 1145 (((INSTANCE) == TIM4) && \ 1146 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1147 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1148 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1149 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1150 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1151 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1152 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1153 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1154 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1155 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1156 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1157 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1158 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1159 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1160 || \ 1161 (((INSTANCE) == TIM5) && \ 1162 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1163 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1164 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1165 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1166 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1167 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1168 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1169 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1170 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1171 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1172 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1173 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1174 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1175 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1176 || \ 1177 (((INSTANCE) == TIM8) && \ 1178 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1179 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1180 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1181 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1182 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1183 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1184 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1185 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1186 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1187 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1188 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1189 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1190 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1191 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1192 || \ 1193 (((INSTANCE) == TIM15) && \ 1194 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1195 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1196 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1197 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1198 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1199 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1200 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1201 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1202 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 1203 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1204 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1205 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)))) 1206 1207 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 1208 ((((INSTANCE) == TIM1) && \ 1209 (((__SELECTION__) == TIM_TS_ITR1) || \ 1210 ((__SELECTION__) == TIM_TS_ITR2) || \ 1211 ((__SELECTION__) == TIM_TS_ITR3) || \ 1212 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1213 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1214 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1215 ((__SELECTION__) == TIM_TS_ETRF) || \ 1216 ((__SELECTION__) == TIM_TS_ITR4) || \ 1217 ((__SELECTION__) == TIM_TS_ITR5) || \ 1218 ((__SELECTION__) == TIM_TS_ITR6) || \ 1219 ((__SELECTION__) == TIM_TS_ITR7) || \ 1220 ((__SELECTION__) == TIM_TS_ITR8))) \ 1221 || \ 1222 (((INSTANCE) == TIM2) && \ 1223 (((__SELECTION__) == TIM_TS_ITR0) || \ 1224 ((__SELECTION__) == TIM_TS_ITR2) || \ 1225 ((__SELECTION__) == TIM_TS_ITR3) || \ 1226 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1227 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1228 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1229 ((__SELECTION__) == TIM_TS_ETRF) || \ 1230 ((__SELECTION__) == TIM_TS_ITR4) || \ 1231 ((__SELECTION__) == TIM_TS_ITR5) || \ 1232 ((__SELECTION__) == TIM_TS_ITR6) || \ 1233 ((__SELECTION__) == TIM_TS_ITR7) || \ 1234 ((__SELECTION__) == TIM_TS_ITR8) || \ 1235 ((__SELECTION__) == TIM_TS_ITR11))) \ 1236 || \ 1237 (((INSTANCE) == TIM3) && \ 1238 (((__SELECTION__) == TIM_TS_ITR0) || \ 1239 ((__SELECTION__) == TIM_TS_ITR1) || \ 1240 ((__SELECTION__) == TIM_TS_ITR3) || \ 1241 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1242 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1243 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1244 ((__SELECTION__) == TIM_TS_ETRF) || \ 1245 ((__SELECTION__) == TIM_TS_ITR4) || \ 1246 ((__SELECTION__) == TIM_TS_ITR5) || \ 1247 ((__SELECTION__) == TIM_TS_ITR6) || \ 1248 ((__SELECTION__) == TIM_TS_ITR7) || \ 1249 ((__SELECTION__) == TIM_TS_ITR8))) \ 1250 || \ 1251 (((INSTANCE) == TIM4) && \ 1252 (((__SELECTION__) == TIM_TS_ITR0) || \ 1253 ((__SELECTION__) == TIM_TS_ITR1) || \ 1254 ((__SELECTION__) == TIM_TS_ITR2) || \ 1255 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1256 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1257 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1258 ((__SELECTION__) == TIM_TS_ETRF) || \ 1259 ((__SELECTION__) == TIM_TS_ITR4) || \ 1260 ((__SELECTION__) == TIM_TS_ITR5) || \ 1261 ((__SELECTION__) == TIM_TS_ITR6) || \ 1262 ((__SELECTION__) == TIM_TS_ITR7) || \ 1263 ((__SELECTION__) == TIM_TS_ITR8))) \ 1264 || \ 1265 (((INSTANCE) == TIM5) && \ 1266 (((__SELECTION__) == TIM_TS_ITR0) || \ 1267 ((__SELECTION__) == TIM_TS_ITR1) || \ 1268 ((__SELECTION__) == TIM_TS_ITR2) || \ 1269 ((__SELECTION__) == TIM_TS_ITR3) || \ 1270 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1271 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1272 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1273 ((__SELECTION__) == TIM_TS_ETRF) || \ 1274 ((__SELECTION__) == TIM_TS_ITR5) || \ 1275 ((__SELECTION__) == TIM_TS_ITR6) || \ 1276 ((__SELECTION__) == TIM_TS_ITR7) || \ 1277 ((__SELECTION__) == TIM_TS_ITR8))) \ 1278 || \ 1279 (((INSTANCE) == TIM8) && \ 1280 (((__SELECTION__) == TIM_TS_ITR0) || \ 1281 ((__SELECTION__) == TIM_TS_ITR1) || \ 1282 ((__SELECTION__) == TIM_TS_ITR2) || \ 1283 ((__SELECTION__) == TIM_TS_ITR3) || \ 1284 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1285 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1286 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1287 ((__SELECTION__) == TIM_TS_ETRF) || \ 1288 ((__SELECTION__) == TIM_TS_ITR4) || \ 1289 ((__SELECTION__) == TIM_TS_ITR6) || \ 1290 ((__SELECTION__) == TIM_TS_ITR7) || \ 1291 ((__SELECTION__) == TIM_TS_ITR8))) \ 1292 || \ 1293 (((INSTANCE) == TIM15) && \ 1294 (((__SELECTION__) == TIM_TS_ITR0) || \ 1295 ((__SELECTION__) == TIM_TS_ITR1) || \ 1296 ((__SELECTION__) == TIM_TS_ITR2) || \ 1297 ((__SELECTION__) == TIM_TS_ITR3) || \ 1298 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1299 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1300 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1301 ((__SELECTION__) == TIM_TS_ITR4) || \ 1302 ((__SELECTION__) == TIM_TS_ITR5) || \ 1303 ((__SELECTION__) == TIM_TS_ITR7) || \ 1304 ((__SELECTION__) == TIM_TS_ITR8)))) 1305 1306 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 1307 ((((INSTANCE) == TIM1) && \ 1308 (((__SELECTION__) == TIM_TS_ITR1) || \ 1309 ((__SELECTION__) == TIM_TS_ITR2) || \ 1310 ((__SELECTION__) == TIM_TS_ITR3) || \ 1311 ((__SELECTION__) == TIM_TS_ITR4) || \ 1312 ((__SELECTION__) == TIM_TS_ITR5) || \ 1313 ((__SELECTION__) == TIM_TS_ITR6) || \ 1314 ((__SELECTION__) == TIM_TS_ITR7) || \ 1315 ((__SELECTION__) == TIM_TS_ITR8) || \ 1316 ((__SELECTION__) == TIM_TS_NONE))) \ 1317 || \ 1318 (((INSTANCE) == TIM2) && \ 1319 (((__SELECTION__) == TIM_TS_ITR0) || \ 1320 ((__SELECTION__) == TIM_TS_ITR2) || \ 1321 ((__SELECTION__) == TIM_TS_ITR3) || \ 1322 ((__SELECTION__) == TIM_TS_ITR4) || \ 1323 ((__SELECTION__) == TIM_TS_ITR5) || \ 1324 ((__SELECTION__) == TIM_TS_ITR6) || \ 1325 ((__SELECTION__) == TIM_TS_ITR7) || \ 1326 ((__SELECTION__) == TIM_TS_ITR8) || \ 1327 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1328 ((__SELECTION__) == TIM_TS_NONE))) \ 1329 || \ 1330 (((INSTANCE) == TIM3) && \ 1331 (((__SELECTION__) == TIM_TS_ITR0) || \ 1332 ((__SELECTION__) == TIM_TS_ITR1) || \ 1333 ((__SELECTION__) == TIM_TS_ITR3) || \ 1334 ((__SELECTION__) == TIM_TS_ITR4) || \ 1335 ((__SELECTION__) == TIM_TS_ITR5) || \ 1336 ((__SELECTION__) == TIM_TS_ITR6) || \ 1337 ((__SELECTION__) == TIM_TS_ITR7) || \ 1338 ((__SELECTION__) == TIM_TS_ITR8) || \ 1339 ((__SELECTION__) == TIM_TS_NONE))) \ 1340 || \ 1341 (((INSTANCE) == TIM4) && \ 1342 (((__SELECTION__) == TIM_TS_ITR0) || \ 1343 ((__SELECTION__) == TIM_TS_ITR1) || \ 1344 ((__SELECTION__) == TIM_TS_ITR2) || \ 1345 ((__SELECTION__) == TIM_TS_ITR4) || \ 1346 ((__SELECTION__) == TIM_TS_ITR5) || \ 1347 ((__SELECTION__) == TIM_TS_ITR6) || \ 1348 ((__SELECTION__) == TIM_TS_ITR7) || \ 1349 ((__SELECTION__) == TIM_TS_ITR8) || \ 1350 ((__SELECTION__) == TIM_TS_NONE))) \ 1351 || \ 1352 (((INSTANCE) == TIM5) && \ 1353 (((__SELECTION__) == TIM_TS_ITR0) || \ 1354 ((__SELECTION__) == TIM_TS_ITR1) || \ 1355 ((__SELECTION__) == TIM_TS_ITR2) || \ 1356 ((__SELECTION__) == TIM_TS_ITR3) || \ 1357 ((__SELECTION__) == TIM_TS_ITR5) || \ 1358 ((__SELECTION__) == TIM_TS_ITR6) || \ 1359 ((__SELECTION__) == TIM_TS_ITR7) || \ 1360 ((__SELECTION__) == TIM_TS_ITR8) || \ 1361 ((__SELECTION__) == TIM_TS_NONE))) \ 1362 || \ 1363 (((INSTANCE) == TIM8) && \ 1364 (((__SELECTION__) == TIM_TS_ITR0) || \ 1365 ((__SELECTION__) == TIM_TS_ITR1) || \ 1366 ((__SELECTION__) == TIM_TS_ITR2) || \ 1367 ((__SELECTION__) == TIM_TS_ITR3) || \ 1368 ((__SELECTION__) == TIM_TS_ITR4) || \ 1369 ((__SELECTION__) == TIM_TS_ITR6) || \ 1370 ((__SELECTION__) == TIM_TS_ITR7) || \ 1371 ((__SELECTION__) == TIM_TS_ITR8) || \ 1372 ((__SELECTION__) == TIM_TS_NONE))) \ 1373 || \ 1374 (((INSTANCE) == TIM15) && \ 1375 (((__SELECTION__) == TIM_TS_ITR0) || \ 1376 ((__SELECTION__) == TIM_TS_ITR1) || \ 1377 ((__SELECTION__) == TIM_TS_ITR2) || \ 1378 ((__SELECTION__) == TIM_TS_ITR3) || \ 1379 ((__SELECTION__) == TIM_TS_ITR4) || \ 1380 ((__SELECTION__) == TIM_TS_ITR5) || \ 1381 ((__SELECTION__) == TIM_TS_ITR7) || \ 1382 ((__SELECTION__) == TIM_TS_ITR8) || \ 1383 ((__SELECTION__) == TIM_TS_NONE)))) 1384 #elif defined(TIM20) 1385 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 1386 ((((INSTANCE) == TIM1) && \ 1387 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1388 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1389 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1390 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1391 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1392 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1393 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1394 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1395 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1396 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1397 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1398 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1399 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1400 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9))) \ 1401 || \ 1402 (((INSTANCE) == TIM2) && \ 1403 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1404 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1405 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1406 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1407 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1408 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1409 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1410 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1411 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1412 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1413 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1414 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1415 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1416 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 1417 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 1418 || \ 1419 (((INSTANCE) == TIM3) && \ 1420 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1421 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1422 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1423 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1424 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1425 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1426 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1427 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1428 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1429 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1430 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1431 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1432 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1433 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9))) \ 1434 || \ 1435 (((INSTANCE) == TIM4) && \ 1436 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1437 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1438 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1439 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1440 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1441 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1442 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1443 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1444 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1445 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1446 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1447 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1448 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1449 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9))) \ 1450 || \ 1451 (((INSTANCE) == TIM8) && \ 1452 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1453 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1454 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1455 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1456 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1457 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1458 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1459 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1460 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1461 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1462 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1463 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1464 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1465 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9))) \ 1466 || \ 1467 (((INSTANCE) == TIM15) && \ 1468 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1469 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1470 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1471 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1472 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1473 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1474 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1475 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1476 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1477 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1478 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1479 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9))) \ 1480 || \ 1481 (((INSTANCE) == TIM20) && \ 1482 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1483 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1484 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1485 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1486 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1487 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1488 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1489 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1490 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1491 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1492 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1493 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1494 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1495 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)))) 1496 1497 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 1498 ((((INSTANCE) == TIM1) && \ 1499 (((__SELECTION__) == TIM_TS_ITR1) || \ 1500 ((__SELECTION__) == TIM_TS_ITR2) || \ 1501 ((__SELECTION__) == TIM_TS_ITR3) || \ 1502 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1503 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1504 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1505 ((__SELECTION__) == TIM_TS_ETRF) || \ 1506 ((__SELECTION__) == TIM_TS_ITR5) || \ 1507 ((__SELECTION__) == TIM_TS_ITR6) || \ 1508 ((__SELECTION__) == TIM_TS_ITR7) || \ 1509 ((__SELECTION__) == TIM_TS_ITR8) || \ 1510 ((__SELECTION__) == TIM_TS_ITR9))) \ 1511 || \ 1512 (((INSTANCE) == TIM2) && \ 1513 (((__SELECTION__) == TIM_TS_ITR0) || \ 1514 ((__SELECTION__) == TIM_TS_ITR2) || \ 1515 ((__SELECTION__) == TIM_TS_ITR3) || \ 1516 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1517 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1518 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1519 ((__SELECTION__) == TIM_TS_ETRF) || \ 1520 ((__SELECTION__) == TIM_TS_ITR5) || \ 1521 ((__SELECTION__) == TIM_TS_ITR6) || \ 1522 ((__SELECTION__) == TIM_TS_ITR7) || \ 1523 ((__SELECTION__) == TIM_TS_ITR8) || \ 1524 ((__SELECTION__) == TIM_TS_ITR9) || \ 1525 ((__SELECTION__) == TIM_TS_ITR11))) \ 1526 || \ 1527 (((INSTANCE) == TIM3) && \ 1528 (((__SELECTION__) == TIM_TS_ITR0) || \ 1529 ((__SELECTION__) == TIM_TS_ITR1) || \ 1530 ((__SELECTION__) == TIM_TS_ITR3) || \ 1531 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1532 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1533 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1534 ((__SELECTION__) == TIM_TS_ETRF) || \ 1535 ((__SELECTION__) == TIM_TS_ITR5) || \ 1536 ((__SELECTION__) == TIM_TS_ITR6) || \ 1537 ((__SELECTION__) == TIM_TS_ITR7) || \ 1538 ((__SELECTION__) == TIM_TS_ITR8) || \ 1539 ((__SELECTION__) == TIM_TS_ITR9))) \ 1540 || \ 1541 (((INSTANCE) == TIM4) && \ 1542 (((__SELECTION__) == TIM_TS_ITR0) || \ 1543 ((__SELECTION__) == TIM_TS_ITR1) || \ 1544 ((__SELECTION__) == TIM_TS_ITR2) || \ 1545 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1546 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1547 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1548 ((__SELECTION__) == TIM_TS_ETRF) || \ 1549 ((__SELECTION__) == TIM_TS_ITR5) || \ 1550 ((__SELECTION__) == TIM_TS_ITR6) || \ 1551 ((__SELECTION__) == TIM_TS_ITR7) || \ 1552 ((__SELECTION__) == TIM_TS_ITR8) || \ 1553 ((__SELECTION__) == TIM_TS_ITR9))) \ 1554 || \ 1555 (((INSTANCE) == TIM8) && \ 1556 (((__SELECTION__) == TIM_TS_ITR0) || \ 1557 ((__SELECTION__) == TIM_TS_ITR1) || \ 1558 ((__SELECTION__) == TIM_TS_ITR2) || \ 1559 ((__SELECTION__) == TIM_TS_ITR3) || \ 1560 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1561 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1562 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1563 ((__SELECTION__) == TIM_TS_ETRF) || \ 1564 ((__SELECTION__) == TIM_TS_ITR6) || \ 1565 ((__SELECTION__) == TIM_TS_ITR7) || \ 1566 ((__SELECTION__) == TIM_TS_ITR8) || \ 1567 ((__SELECTION__) == TIM_TS_ITR9))) \ 1568 || \ 1569 (((INSTANCE) == TIM15) && \ 1570 (((__SELECTION__) == TIM_TS_ITR0) || \ 1571 ((__SELECTION__) == TIM_TS_ITR1) || \ 1572 ((__SELECTION__) == TIM_TS_ITR2) || \ 1573 ((__SELECTION__) == TIM_TS_ITR3) || \ 1574 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1575 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1576 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1577 ((__SELECTION__) == TIM_TS_ITR5) || \ 1578 ((__SELECTION__) == TIM_TS_ITR7) || \ 1579 ((__SELECTION__) == TIM_TS_ITR8) || \ 1580 ((__SELECTION__) == TIM_TS_ITR9))) \ 1581 || \ 1582 (((INSTANCE) == TIM20) && \ 1583 (((__SELECTION__) == TIM_TS_ITR0) || \ 1584 ((__SELECTION__) == TIM_TS_ITR1) || \ 1585 ((__SELECTION__) == TIM_TS_ITR2) || \ 1586 ((__SELECTION__) == TIM_TS_ITR3) || \ 1587 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1588 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1589 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1590 ((__SELECTION__) == TIM_TS_ETRF) || \ 1591 ((__SELECTION__) == TIM_TS_ITR5) || \ 1592 ((__SELECTION__) == TIM_TS_ITR6) || \ 1593 ((__SELECTION__) == TIM_TS_ITR7) || \ 1594 ((__SELECTION__) == TIM_TS_ITR8)))) 1595 1596 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 1597 ((((INSTANCE) == TIM1) && \ 1598 (((__SELECTION__) == TIM_TS_ITR1) || \ 1599 ((__SELECTION__) == TIM_TS_ITR2) || \ 1600 ((__SELECTION__) == TIM_TS_ITR3) || \ 1601 ((__SELECTION__) == TIM_TS_ITR5) || \ 1602 ((__SELECTION__) == TIM_TS_ITR6) || \ 1603 ((__SELECTION__) == TIM_TS_ITR7) || \ 1604 ((__SELECTION__) == TIM_TS_ITR8) || \ 1605 ((__SELECTION__) == TIM_TS_ITR9) || \ 1606 ((__SELECTION__) == TIM_TS_NONE))) \ 1607 || \ 1608 (((INSTANCE) == TIM2) && \ 1609 (((__SELECTION__) == TIM_TS_ITR0) || \ 1610 ((__SELECTION__) == TIM_TS_ITR2) || \ 1611 ((__SELECTION__) == TIM_TS_ITR3) || \ 1612 ((__SELECTION__) == TIM_TS_ITR5) || \ 1613 ((__SELECTION__) == TIM_TS_ITR6) || \ 1614 ((__SELECTION__) == TIM_TS_ITR7) || \ 1615 ((__SELECTION__) == TIM_TS_ITR8) || \ 1616 ((__SELECTION__) == TIM_TS_ITR9) || \ 1617 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1618 ((__SELECTION__) == TIM_TS_NONE))) \ 1619 || \ 1620 (((INSTANCE) == TIM3) && \ 1621 (((__SELECTION__) == TIM_TS_ITR0) || \ 1622 ((__SELECTION__) == TIM_TS_ITR1) || \ 1623 ((__SELECTION__) == TIM_TS_ITR3) || \ 1624 ((__SELECTION__) == TIM_TS_ITR5) || \ 1625 ((__SELECTION__) == TIM_TS_ITR6) || \ 1626 ((__SELECTION__) == TIM_TS_ITR7) || \ 1627 ((__SELECTION__) == TIM_TS_ITR8) || \ 1628 ((__SELECTION__) == TIM_TS_ITR9) || \ 1629 ((__SELECTION__) == TIM_TS_NONE))) \ 1630 || \ 1631 (((INSTANCE) == TIM4) && \ 1632 (((__SELECTION__) == TIM_TS_ITR0) || \ 1633 ((__SELECTION__) == TIM_TS_ITR1) || \ 1634 ((__SELECTION__) == TIM_TS_ITR2) || \ 1635 ((__SELECTION__) == TIM_TS_ITR5) || \ 1636 ((__SELECTION__) == TIM_TS_ITR6) || \ 1637 ((__SELECTION__) == TIM_TS_ITR7) || \ 1638 ((__SELECTION__) == TIM_TS_ITR8) || \ 1639 ((__SELECTION__) == TIM_TS_ITR9) || \ 1640 ((__SELECTION__) == TIM_TS_NONE))) \ 1641 || \ 1642 (((INSTANCE) == TIM8) && \ 1643 (((__SELECTION__) == TIM_TS_ITR0) || \ 1644 ((__SELECTION__) == TIM_TS_ITR1) || \ 1645 ((__SELECTION__) == TIM_TS_ITR2) || \ 1646 ((__SELECTION__) == TIM_TS_ITR3) || \ 1647 ((__SELECTION__) == TIM_TS_ITR6) || \ 1648 ((__SELECTION__) == TIM_TS_ITR7) || \ 1649 ((__SELECTION__) == TIM_TS_ITR8) || \ 1650 ((__SELECTION__) == TIM_TS_ITR9) || \ 1651 ((__SELECTION__) == TIM_TS_NONE))) \ 1652 || \ 1653 (((INSTANCE) == TIM15) && \ 1654 (((__SELECTION__) == TIM_TS_ITR0) || \ 1655 ((__SELECTION__) == TIM_TS_ITR1) || \ 1656 ((__SELECTION__) == TIM_TS_ITR2) || \ 1657 ((__SELECTION__) == TIM_TS_ITR3) || \ 1658 ((__SELECTION__) == TIM_TS_ITR5) || \ 1659 ((__SELECTION__) == TIM_TS_ITR7) || \ 1660 ((__SELECTION__) == TIM_TS_ITR8) || \ 1661 ((__SELECTION__) == TIM_TS_ITR9) || \ 1662 ((__SELECTION__) == TIM_TS_NONE))) \ 1663 || \ 1664 (((INSTANCE) == TIM20) && \ 1665 (((__SELECTION__) == TIM_TS_ITR0) || \ 1666 ((__SELECTION__) == TIM_TS_ITR1) || \ 1667 ((__SELECTION__) == TIM_TS_ITR2) || \ 1668 ((__SELECTION__) == TIM_TS_ITR3) || \ 1669 ((__SELECTION__) == TIM_TS_ITR5) || \ 1670 ((__SELECTION__) == TIM_TS_ITR6) || \ 1671 ((__SELECTION__) == TIM_TS_ITR7) || \ 1672 ((__SELECTION__) == TIM_TS_ITR8) || \ 1673 ((__SELECTION__) == TIM_TS_NONE)))) 1674 #else 1675 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 1676 ((((INSTANCE) == TIM1) && \ 1677 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1678 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1679 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1680 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1681 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1682 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1683 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1684 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1685 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1686 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1687 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1688 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1689 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1690 || \ 1691 (((INSTANCE) == TIM2) && \ 1692 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1693 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1694 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1695 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1696 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1697 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1698 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1699 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1700 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1701 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1702 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1703 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1704 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 1705 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 1706 || \ 1707 (((INSTANCE) == TIM3) && \ 1708 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1709 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1710 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1711 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1712 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1713 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1714 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1715 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1716 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1717 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1718 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1719 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1720 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1721 || \ 1722 (((INSTANCE) == TIM4) && \ 1723 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1724 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1725 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1726 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1727 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1728 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1729 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1730 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1731 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1732 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1733 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1734 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1735 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1736 || \ 1737 (((INSTANCE) == TIM8) && \ 1738 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1739 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 1740 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1741 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1742 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1743 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1744 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1745 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1746 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1747 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 1748 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 1749 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1750 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 1751 || \ 1752 (((INSTANCE) == TIM15) && \ 1753 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 1754 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 1755 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 1756 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 1757 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 1758 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 1759 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 1760 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 1761 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 1762 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 1763 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)))) 1764 1765 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 1766 ((((INSTANCE) == TIM1) && \ 1767 (((__SELECTION__) == TIM_TS_ITR1) || \ 1768 ((__SELECTION__) == TIM_TS_ITR2) || \ 1769 ((__SELECTION__) == TIM_TS_ITR3) || \ 1770 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1771 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1772 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1773 ((__SELECTION__) == TIM_TS_ETRF) || \ 1774 ((__SELECTION__) == TIM_TS_ITR5) || \ 1775 ((__SELECTION__) == TIM_TS_ITR6) || \ 1776 ((__SELECTION__) == TIM_TS_ITR7) || \ 1777 ((__SELECTION__) == TIM_TS_ITR8))) \ 1778 || \ 1779 (((INSTANCE) == TIM2) && \ 1780 (((__SELECTION__) == TIM_TS_ITR0) || \ 1781 ((__SELECTION__) == TIM_TS_ITR2) || \ 1782 ((__SELECTION__) == TIM_TS_ITR3) || \ 1783 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1784 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1785 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1786 ((__SELECTION__) == TIM_TS_ETRF) || \ 1787 ((__SELECTION__) == TIM_TS_ITR5) || \ 1788 ((__SELECTION__) == TIM_TS_ITR6) || \ 1789 ((__SELECTION__) == TIM_TS_ITR7) || \ 1790 ((__SELECTION__) == TIM_TS_ITR8) || \ 1791 ((__SELECTION__) == TIM_TS_ITR11))) \ 1792 || \ 1793 (((INSTANCE) == TIM3) && \ 1794 (((__SELECTION__) == TIM_TS_ITR0) || \ 1795 ((__SELECTION__) == TIM_TS_ITR1) || \ 1796 ((__SELECTION__) == TIM_TS_ITR3) || \ 1797 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1798 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1799 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1800 ((__SELECTION__) == TIM_TS_ETRF) || \ 1801 ((__SELECTION__) == TIM_TS_ITR5) || \ 1802 ((__SELECTION__) == TIM_TS_ITR6) || \ 1803 ((__SELECTION__) == TIM_TS_ITR7) || \ 1804 ((__SELECTION__) == TIM_TS_ITR8))) \ 1805 || \ 1806 (((INSTANCE) == TIM4) && \ 1807 (((__SELECTION__) == TIM_TS_ITR0) || \ 1808 ((__SELECTION__) == TIM_TS_ITR1) || \ 1809 ((__SELECTION__) == TIM_TS_ITR2) || \ 1810 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1811 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1812 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1813 ((__SELECTION__) == TIM_TS_ETRF) || \ 1814 ((__SELECTION__) == TIM_TS_ITR5) || \ 1815 ((__SELECTION__) == TIM_TS_ITR6) || \ 1816 ((__SELECTION__) == TIM_TS_ITR7) || \ 1817 ((__SELECTION__) == TIM_TS_ITR8))) \ 1818 || \ 1819 (((INSTANCE) == TIM8) && \ 1820 (((__SELECTION__) == TIM_TS_ITR0) || \ 1821 ((__SELECTION__) == TIM_TS_ITR1) || \ 1822 ((__SELECTION__) == TIM_TS_ITR2) || \ 1823 ((__SELECTION__) == TIM_TS_ITR3) || \ 1824 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1825 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1826 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1827 ((__SELECTION__) == TIM_TS_ETRF) || \ 1828 ((__SELECTION__) == TIM_TS_ITR6) || \ 1829 ((__SELECTION__) == TIM_TS_ITR7) || \ 1830 ((__SELECTION__) == TIM_TS_ITR8))) \ 1831 || \ 1832 (((INSTANCE) == TIM15) && \ 1833 (((__SELECTION__) == TIM_TS_ITR0) || \ 1834 ((__SELECTION__) == TIM_TS_ITR1) || \ 1835 ((__SELECTION__) == TIM_TS_ITR2) || \ 1836 ((__SELECTION__) == TIM_TS_ITR3) || \ 1837 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1838 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1839 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1840 ((__SELECTION__) == TIM_TS_ITR5) || \ 1841 ((__SELECTION__) == TIM_TS_ITR7) || \ 1842 ((__SELECTION__) == TIM_TS_ITR8)))) 1843 1844 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 1845 ((((INSTANCE) == TIM1) && \ 1846 (((__SELECTION__) == TIM_TS_ITR1) || \ 1847 ((__SELECTION__) == TIM_TS_ITR2) || \ 1848 ((__SELECTION__) == TIM_TS_ITR3) || \ 1849 ((__SELECTION__) == TIM_TS_ITR5) || \ 1850 ((__SELECTION__) == TIM_TS_ITR6) || \ 1851 ((__SELECTION__) == TIM_TS_ITR7) || \ 1852 ((__SELECTION__) == TIM_TS_ITR8) || \ 1853 ((__SELECTION__) == TIM_TS_NONE))) \ 1854 || \ 1855 (((INSTANCE) == TIM2) && \ 1856 (((__SELECTION__) == TIM_TS_ITR0) || \ 1857 ((__SELECTION__) == TIM_TS_ITR2) || \ 1858 ((__SELECTION__) == TIM_TS_ITR3) || \ 1859 ((__SELECTION__) == TIM_TS_ITR5) || \ 1860 ((__SELECTION__) == TIM_TS_ITR6) || \ 1861 ((__SELECTION__) == TIM_TS_ITR7) || \ 1862 ((__SELECTION__) == TIM_TS_ITR8) || \ 1863 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1864 ((__SELECTION__) == TIM_TS_NONE))) \ 1865 || \ 1866 (((INSTANCE) == TIM3) && \ 1867 (((__SELECTION__) == TIM_TS_ITR0) || \ 1868 ((__SELECTION__) == TIM_TS_ITR1) || \ 1869 ((__SELECTION__) == TIM_TS_ITR3) || \ 1870 ((__SELECTION__) == TIM_TS_ITR5) || \ 1871 ((__SELECTION__) == TIM_TS_ITR6) || \ 1872 ((__SELECTION__) == TIM_TS_ITR7) || \ 1873 ((__SELECTION__) == TIM_TS_ITR8) || \ 1874 ((__SELECTION__) == TIM_TS_NONE))) \ 1875 || \ 1876 (((INSTANCE) == TIM4) && \ 1877 (((__SELECTION__) == TIM_TS_ITR0) || \ 1878 ((__SELECTION__) == TIM_TS_ITR1) || \ 1879 ((__SELECTION__) == TIM_TS_ITR2) || \ 1880 ((__SELECTION__) == TIM_TS_ITR5) || \ 1881 ((__SELECTION__) == TIM_TS_ITR6) || \ 1882 ((__SELECTION__) == TIM_TS_ITR7) || \ 1883 ((__SELECTION__) == TIM_TS_ITR8) || \ 1884 ((__SELECTION__) == TIM_TS_NONE))) \ 1885 || \ 1886 (((INSTANCE) == TIM8) && \ 1887 (((__SELECTION__) == TIM_TS_ITR0) || \ 1888 ((__SELECTION__) == TIM_TS_ITR1) || \ 1889 ((__SELECTION__) == TIM_TS_ITR2) || \ 1890 ((__SELECTION__) == TIM_TS_ITR3) || \ 1891 ((__SELECTION__) == TIM_TS_ITR6) || \ 1892 ((__SELECTION__) == TIM_TS_ITR7) || \ 1893 ((__SELECTION__) == TIM_TS_ITR8) || \ 1894 ((__SELECTION__) == TIM_TS_NONE))) \ 1895 || \ 1896 (((INSTANCE) == TIM15) && \ 1897 (((__SELECTION__) == TIM_TS_ITR0) || \ 1898 ((__SELECTION__) == TIM_TS_ITR1) || \ 1899 ((__SELECTION__) == TIM_TS_ITR2) || \ 1900 ((__SELECTION__) == TIM_TS_ITR3) || \ 1901 ((__SELECTION__) == TIM_TS_ITR5) || \ 1902 ((__SELECTION__) == TIM_TS_ITR7) || \ 1903 ((__SELECTION__) == TIM_TS_ITR8) || \ 1904 ((__SELECTION__) == TIM_TS_NONE)))) 1905 1906 #endif /* TIM5 && TIM20 */ 1907 #define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__) \ 1908 (IS_TIM_OC_MODE(__MODE__) \ 1909 && ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \ 1910 ? (((__CHANNEL__) == TIM_CHANNEL_3) || ((__CHANNEL__) == TIM_CHANNEL_4)) : (1 == 1))) 1911 1912 #define IS_TIM_PULSEONCOMPARE_CHANNEL(__CHANNEL__) \ 1913 (((__CHANNEL__) == TIM_CHANNEL_3) || \ 1914 ((__CHANNEL__) == TIM_CHANNEL_4)) 1915 1916 #define IS_TIM_PULSEONCOMPARE_INSTANCE(INSTANCE) IS_TIM_CC3_INSTANCE(INSTANCE) 1917 1918 #define IS_TIM_PULSEONCOMPARE_WIDTH(__WIDTH__) ((__WIDTH__) <= 0xFFU) 1919 1920 #define IS_TIM_PULSEONCOMPARE_WIDTHPRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0x7U) 1921 1922 #define IS_TIM_SLAVE_PRELOAD_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_UPDATE) \ 1923 || ((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_INDEX)) 1924 1925 #define IS_TIM_ENCODERINDEX_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_INVERTED) || \ 1926 ((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_NONINVERTED)) 1927 1928 #define IS_TIM_ENCODERINDEX_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV1) || \ 1929 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV2) || \ 1930 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV4) || \ 1931 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV8)) 1932 1933 #define IS_TIM_ENCODERINDEX_FILTER(__FILTER__) ((__FILTER__) <= 0xFUL) 1934 1935 #define IS_TIM_ENCODERINDEX_POSITION(__POSITION__) (((__POSITION__) == TIM_ENCODERINDEX_POSITION_00) || \ 1936 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_01) || \ 1937 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_10) || \ 1938 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_11) || \ 1939 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_0) || \ 1940 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_1)) 1941 1942 #define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__) (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \ 1943 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP) || \ 1944 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN)) 1945 1946 /** 1947 * @} 1948 */ 1949 /* End of private macro ------------------------------------------------------*/ 1950 1951 /* Exported functions --------------------------------------------------------*/ 1952 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 1953 * @{ 1954 */ 1955 1956 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 1957 * @brief Timer Hall Sensor functions 1958 * @{ 1959 */ 1960 /* Timer Hall Sensor functions **********************************************/ 1961 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 1962 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 1963 1964 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 1965 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 1966 1967 /* Blocking mode: Polling */ 1968 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 1969 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 1970 /* Non-Blocking mode: Interrupt */ 1971 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 1972 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 1973 /* Non-Blocking mode: DMA */ 1974 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 1975 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 1976 /** 1977 * @} 1978 */ 1979 1980 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 1981 * @brief Timer Complementary Output Compare functions 1982 * @{ 1983 */ 1984 /* Timer Complementary Output Compare functions *****************************/ 1985 /* Blocking mode: Polling */ 1986 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 1987 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 1988 1989 /* Non-Blocking mode: Interrupt */ 1990 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1991 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1992 1993 /* Non-Blocking mode: DMA */ 1994 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 1995 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 1996 /** 1997 * @} 1998 */ 1999 2000 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 2001 * @brief Timer Complementary PWM functions 2002 * @{ 2003 */ 2004 /* Timer Complementary PWM functions ****************************************/ 2005 /* Blocking mode: Polling */ 2006 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 2007 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 2008 2009 /* Non-Blocking mode: Interrupt */ 2010 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 2011 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 2012 /* Non-Blocking mode: DMA */ 2013 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 2014 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 2015 /** 2016 * @} 2017 */ 2018 2019 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 2020 * @brief Timer Complementary One Pulse functions 2021 * @{ 2022 */ 2023 /* Timer Complementary One Pulse functions **********************************/ 2024 /* Blocking mode: Polling */ 2025 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 2026 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 2027 2028 /* Non-Blocking mode: Interrupt */ 2029 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 2030 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 2031 /** 2032 * @} 2033 */ 2034 2035 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 2036 * @brief Peripheral Control functions 2037 * @{ 2038 */ 2039 /* Extended Control functions ************************************************/ 2040 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 2041 uint32_t CommutationSource); 2042 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 2043 uint32_t CommutationSource); 2044 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 2045 uint32_t CommutationSource); 2046 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 2047 TIM_MasterConfigTypeDef *sMasterConfig); 2048 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 2049 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 2050 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 2051 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 2052 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 2053 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 2054 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 2055 2056 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 2057 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 2058 HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim); 2059 HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim); 2060 HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler, 2061 uint32_t PulseWidth); 2062 HAL_StatusTypeDef HAL_TIMEx_ConfigSlaveModePreload(TIM_HandleTypeDef *htim, uint32_t Source); 2063 HAL_StatusTypeDef HAL_TIMEx_EnableSlaveModePreload(TIM_HandleTypeDef *htim); 2064 HAL_StatusTypeDef HAL_TIMEx_DisableSlaveModePreload(TIM_HandleTypeDef *htim); 2065 HAL_StatusTypeDef HAL_TIMEx_EnableDeadTimePreload(TIM_HandleTypeDef *htim); 2066 HAL_StatusTypeDef HAL_TIMEx_DisableDeadTimePreload(TIM_HandleTypeDef *htim); 2067 HAL_StatusTypeDef HAL_TIMEx_ConfigDeadTime(TIM_HandleTypeDef *htim, uint32_t Deadtime); 2068 HAL_StatusTypeDef HAL_TIMEx_ConfigAsymmetricalDeadTime(TIM_HandleTypeDef *htim, uint32_t FallingDeadtime); 2069 HAL_StatusTypeDef HAL_TIMEx_EnableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 2070 HAL_StatusTypeDef HAL_TIMEx_DisableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 2071 HAL_StatusTypeDef HAL_TIMEx_ConfigEncoderIndex(TIM_HandleTypeDef *htim, 2072 TIMEx_EncoderIndexConfigTypeDef *sEncoderIndexConfig); 2073 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderIndex(TIM_HandleTypeDef *htim); 2074 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderIndex(TIM_HandleTypeDef *htim); 2075 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderFirstIndex(TIM_HandleTypeDef *htim); 2076 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim); 2077 /** 2078 * @} 2079 */ 2080 2081 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 2082 * @brief Extended Callbacks functions 2083 * @{ 2084 */ 2085 /* Extended Callback **********************************************************/ 2086 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 2087 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 2088 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 2089 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 2090 void HAL_TIMEx_EncoderIndexCallback(TIM_HandleTypeDef *htim); 2091 void HAL_TIMEx_DirectionChangeCallback(TIM_HandleTypeDef *htim); 2092 void HAL_TIMEx_IndexErrorCallback(TIM_HandleTypeDef *htim); 2093 void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim); 2094 /** 2095 * @} 2096 */ 2097 2098 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 2099 * @brief Extended Peripheral State functions 2100 * @{ 2101 */ 2102 /* Extended Peripheral State functions ***************************************/ 2103 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 2104 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN); 2105 /** 2106 * @} 2107 */ 2108 2109 /** 2110 * @} 2111 */ 2112 /* End of exported functions -------------------------------------------------*/ 2113 2114 /* Private functions----------------------------------------------------------*/ 2115 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 2116 * @{ 2117 */ 2118 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 2119 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 2120 /** 2121 * @} 2122 */ 2123 /* End of private functions --------------------------------------------------*/ 2124 2125 /** 2126 * @} 2127 */ 2128 2129 /** 2130 * @} 2131 */ 2132 2133 #ifdef __cplusplus 2134 } 2135 #endif 2136 2137 2138 #endif /* STM32G4xx_HAL_TIM_EX_H */ 2139
