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Searched refs:RCC_CCIPR_SAI1SEL_Msk (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h7901 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
7902 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32wb5mxx.h8128 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
8129 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32wb55xx.h8128 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
8129 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h8042 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8043 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g431xx.h8070 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8071 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g441xx.h8300 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8301 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g471xx.h8639 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8640 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g4a1xx.h8702 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8703 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g473xx.h9189 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
9190 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g491xx.h8472 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
8473 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g483xx.h9419 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
9420 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g484xx.h12998 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
12999 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32g474xx.h12768 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos)/*!< 0x00300000 */ macro
12769 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/
Dstm32l451xx.h10366 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10367 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l433xx.h10199 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10200 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l442xx.h9918 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
9919 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l431xx.h10089 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10090 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l432xx.h9693 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
9694 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l452xx.h10444 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10445 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l462xx.h10669 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10670 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l471xx.h11373 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
11374 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l443xx.h10424 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
10425 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l475xx.h11537 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
11538 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l476xx.h11575 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
11576 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk
Dstm32l485xx.h11762 #define RCC_CCIPR_SAI1SEL_Msk (0x3UL << RCC_CCIPR_SAI1SEL_Pos) /*!< 0x00C00000 */ macro
11763 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk

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