/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_pwr_ex.h | 340 #define PWR_FLAG_WUF5 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF5_Pos) /*!< Wakeup ev…
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 3666 #define PWR_SR1_WUF5_Pos (4U) macro 3667 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g071xx.h | 4365 #define PWR_SR1_WUF5_Pos (4U) macro 4366 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g081xx.h | 4601 #define PWR_SR1_WUF5_Pos (4U) macro 4602 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g0b0xx.h | 4441 #define PWR_SR1_WUF5_Pos (4U) macro 4442 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g0c1xx.h | 5648 #define PWR_SR1_WUF5_Pos (4U) macro 5649 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g0b1xx.h | 5412 #define PWR_SR1_WUF5_Pos (4U) macro 5413 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/ |
D | stm32l412xx.h | 4907 #define PWR_SR1_WUF5_Pos (4U) macro 4908 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l422xx.h | 5123 #define PWR_SR1_WUF5_Pos (4U) macro 5124 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l451xx.h | 8847 #define PWR_SR1_WUF5_Pos (4U) macro 8848 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l433xx.h | 8679 #define PWR_SR1_WUF5_Pos (4U) macro 8680 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l442xx.h | 8815 #define PWR_SR1_WUF5_Pos (4U) macro 8816 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l431xx.h | 8590 #define PWR_SR1_WUF5_Pos (4U) macro 8591 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l432xx.h | 8599 #define PWR_SR1_WUF5_Pos (4U) macro 8600 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32l452xx.h | 8913 #define PWR_SR1_WUF5_Pos (4U) macro 8914 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/ |
D | stm32gbk1cb.h | 6541 #define PWR_SR1_WUF5_Pos (4U) macro 6542 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g431xx.h | 6555 #define PWR_SR1_WUF5_Pos (4U) macro 6556 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g441xx.h | 6776 #define PWR_SR1_WUF5_Pos (4U) macro 6777 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g471xx.h | 6790 #define PWR_SR1_WUF5_Pos (4U) macro 6791 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g4a1xx.h | 6940 #define PWR_SR1_WUF5_Pos (4U) macro 6941 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g473xx.h | 7304 #define PWR_SR1_WUF5_Pos (4U) macro 7305 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g491xx.h | 6719 #define PWR_SR1_WUF5_Pos (4U) macro 6720 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32g483xx.h | 7525 #define PWR_SR1_WUF5_Pos (4U) macro 7526 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb5mxx.h | 6413 #define PWR_SR1_WUF5_Pos (4U) macro 6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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D | stm32wb55xx.h | 6413 #define PWR_SR1_WUF5_Pos (4U) macro 6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
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