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Searched refs:PWR_SR1_WUF5_Pos (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_pwr_ex.h340 #define PWR_FLAG_WUF5 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF5_Pos) /*!< Wakeup ev…
/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h3666 #define PWR_SR1_WUF5_Pos (4U) macro
3667 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g071xx.h4365 #define PWR_SR1_WUF5_Pos (4U) macro
4366 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g081xx.h4601 #define PWR_SR1_WUF5_Pos (4U) macro
4602 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0b0xx.h4441 #define PWR_SR1_WUF5_Pos (4U) macro
4442 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0c1xx.h5648 #define PWR_SR1_WUF5_Pos (4U) macro
5649 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0b1xx.h5412 #define PWR_SR1_WUF5_Pos (4U) macro
5413 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h4907 #define PWR_SR1_WUF5_Pos (4U) macro
4908 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l422xx.h5123 #define PWR_SR1_WUF5_Pos (4U) macro
5124 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l451xx.h8847 #define PWR_SR1_WUF5_Pos (4U) macro
8848 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l433xx.h8679 #define PWR_SR1_WUF5_Pos (4U) macro
8680 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l442xx.h8815 #define PWR_SR1_WUF5_Pos (4U) macro
8816 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l431xx.h8590 #define PWR_SR1_WUF5_Pos (4U) macro
8591 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l432xx.h8599 #define PWR_SR1_WUF5_Pos (4U) macro
8600 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l452xx.h8913 #define PWR_SR1_WUF5_Pos (4U) macro
8914 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h6541 #define PWR_SR1_WUF5_Pos (4U) macro
6542 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g431xx.h6555 #define PWR_SR1_WUF5_Pos (4U) macro
6556 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g441xx.h6776 #define PWR_SR1_WUF5_Pos (4U) macro
6777 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g471xx.h6790 #define PWR_SR1_WUF5_Pos (4U) macro
6791 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g4a1xx.h6940 #define PWR_SR1_WUF5_Pos (4U) macro
6941 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g473xx.h7304 #define PWR_SR1_WUF5_Pos (4U) macro
7305 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g491xx.h6719 #define PWR_SR1_WUF5_Pos (4U) macro
6720 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g483xx.h7525 #define PWR_SR1_WUF5_Pos (4U) macro
7526 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/
Dstm32wb5mxx.h6413 #define PWR_SR1_WUF5_Pos (4U) macro
6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32wb55xx.h6413 #define PWR_SR1_WUF5_Pos (4U) macro
6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */

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