Searched refs:TIM_DCR_DBSS_Pos (Results 1 – 12 of 12) sorted by relevance
7785 #define TIM_DCR_DBSS_Pos (16U) macro7786 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…7788 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100…7789 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00000200…7790 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00000400…7791 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00000800…
10471 #define TIM_DCR_DBSS_Pos (16U) macro10472 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…10474 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100…10475 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00000200…10476 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00000400…10477 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00000800…
12555 #define TIM_DCR_DBSS_Pos (16U) macro12556 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…12558 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100…12559 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00000200…12560 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00000400…12561 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00000800…
12966 #define TIM_DCR_DBSS_Pos (16U) macro12967 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…12969 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00000100…12970 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00000200…12971 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00000400…12972 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00000800…
10517 #define TIM_DCR_DBSS_Pos (16U) macro10518 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…10520 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…10521 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…10522 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…10523 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
10917 #define TIM_DCR_DBSS_Pos (16U) macro10918 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…10920 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…10921 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…10922 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…10923 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
11540 #define TIM_DCR_DBSS_Pos (16U) macro11541 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…11543 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…11544 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…11545 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…11546 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
11989 #define TIM_DCR_DBSS_Pos (16U) macro11990 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…11992 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…11993 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…11994 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…11995 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
12297 #define TIM_DCR_DBSS_Pos (16U) macro12298 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…12300 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…12301 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…12302 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…12303 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
11848 #define TIM_DCR_DBSS_Pos (16U) macro11849 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…11851 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…11852 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…11853 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…11854 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
15567 #define TIM_DCR_DBSS_Pos (16U) macro15568 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…15570 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…15571 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…15572 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…15573 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
16016 #define TIM_DCR_DBSS_Pos (16U) macro16017 #define TIM_DCR_DBSS_Msk (0xFUL << TIM_DCR_DBSS_Pos) /*!< 0x00000F00…16019 #define TIM_DCR_DBSS_0 (0x01UL << TIM_DCR_DBSS_Pos) /*!< 0x00010000…16020 #define TIM_DCR_DBSS_1 (0x02UL << TIM_DCR_DBSS_Pos) /*!< 0x00020000…16021 #define TIM_DCR_DBSS_2 (0x04UL << TIM_DCR_DBSS_Pos) /*!< 0x00040000…16022 #define TIM_DCR_DBSS_3 (0x08UL << TIM_DCR_DBSS_Pos) /*!< 0x00080000…
