Searched refs:TIM1_OR_ETR_RMP_Pos (Results 1 – 12 of 12) sorted by relevance
7151 #define TIM1_OR_ETR_RMP_Pos (0U) macro7152 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */7154 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */7155 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */7156 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */7157 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
7138 #define TIM1_OR_ETR_RMP_Pos (0U) macro7139 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */7141 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */7142 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */7143 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */7144 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
11064 #define TIM1_OR_ETR_RMP_Pos (0U) macro11065 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */11067 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */11068 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */11069 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */11070 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
10782 #define TIM1_OR_ETR_RMP_Pos (0U) macro10783 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */10785 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */10786 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */10787 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */10788 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
10614 #define TIM1_OR_ETR_RMP_Pos (0U) macro10615 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */10617 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */10618 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */10619 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */10620 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
10644 #define TIM1_OR_ETR_RMP_Pos (0U) macro10645 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */10647 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */10648 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */10649 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */10650 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
11622 #define TIM1_OR_ETR_RMP_Pos (0U) macro11623 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */11625 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */11626 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */11627 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */11628 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
12772 #define TIM1_OR_ETR_RMP_Pos (0U) macro12773 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */12775 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */12776 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */12777 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */12778 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
11731 #define TIM1_OR_ETR_RMP_Pos (0U) macro11732 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */11734 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */11735 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */11736 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */11737 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
13495 #define TIM1_OR_ETR_RMP_Pos (0U) macro13496 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */13498 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */13499 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */13500 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */13501 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
13384 #define TIM1_OR_ETR_RMP_Pos (0U) macro13385 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */13387 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */13388 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */13389 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */13390 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
13768 #define TIM1_OR_ETR_RMP_Pos (0U) macro13769 #define TIM1_OR_ETR_RMP_Msk (0xFUL << TIM1_OR_ETR_RMP_Pos) /*!< 0x0000000F */13771 #define TIM1_OR_ETR_RMP_0 (0x1UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000001 */13772 #define TIM1_OR_ETR_RMP_1 (0x2UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000002 */13773 #define TIM1_OR_ETR_RMP_2 (0x4UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000004 */13774 #define TIM1_OR_ETR_RMP_3 (0x8UL << TIM1_OR_ETR_RMP_Pos) /*!< 0x00000008 */
