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Searched refs:SPI_SR_BSY_Pos (Results 1 – 25 of 190) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4399 #define SPI_SR_BSY_Pos (7U) macro
4400 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f101xb.h4461 #define SPI_SR_BSY_Pos (7U) macro
4462 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f102x6.h5518 #define SPI_SR_BSY_Pos (7U) macro
5519 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f100xb.h4866 #define SPI_SR_BSY_Pos (7U) macro
4867 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f102xb.h5572 #define SPI_SR_BSY_Pos (7U) macro
5573 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
/hal_stm32-3.4.0/stm32cube/stm32f0xx/soc/
Dstm32f030x8.h3904 #define SPI_SR_BSY_Pos (7U) macro
3905 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f030x6.h3860 #define SPI_SR_BSY_Pos (7U) macro
3861 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f070x6.h3940 #define SPI_SR_BSY_Pos (7U) macro
3941 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f038xx.h3993 #define SPI_SR_BSY_Pos (7U) macro
3994 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f030xc.h4230 #define SPI_SR_BSY_Pos (7U) macro
4231 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f031x6.h4021 #define SPI_SR_BSY_Pos (7U) macro
4022 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f070xb.h4098 #define SPI_SR_BSY_Pos (7U) macro
4099 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f051x8.h4521 #define SPI_SR_BSY_Pos (7U) macro
4522 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32f058xx.h4493 #define SPI_SR_BSY_Pos (7U) macro
4494 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
/hal_stm32-3.4.0/stm32cube/stm32l0xx/soc/
Dstm32l010xb.h4489 #define SPI_SR_BSY_Pos (7U) macro
4490 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l010x6.h4449 #define SPI_SR_BSY_Pos (7U) macro
4450 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l010x4.h4397 #define SPI_SR_BSY_Pos (7U) macro
4398 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l010x8.h4441 #define SPI_SR_BSY_Pos (7U) macro
4442 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l011xx.h4506 #define SPI_SR_BSY_Pos (7U) macro
4507 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l021xx.h4643 #define SPI_SR_BSY_Pos (7U) macro
4644 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l031xx.h4629 #define SPI_SR_BSY_Pos (7U) macro
4630 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l041xx.h4766 #define SPI_SR_BSY_Pos (7U) macro
4767 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l051xx.h4738 #define SPI_SR_BSY_Pos (7U) macro
4739 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l081xx.h5009 #define SPI_SR_BSY_Pos (7U) macro
5010 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
Dstm32l071xx.h4872 #define SPI_SR_BSY_Pos (7U) macro
4873 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */

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