/hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 13188 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 13189 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /*!<Receive Dat…
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D | stm32h562xx.h | 20159 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 20160 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /*!<Receive Dat…
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D | stm32h563xx.h | 22291 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 22292 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /*!<Receive Dat…
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D | stm32h573xx.h | 22892 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 22893 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /*!<Receive Dat…
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/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 20366 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 20367 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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D | stm32u545xx.h | 20876 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 20877 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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D | stm32u575xx.h | 23378 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 23379 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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D | stm32u585xx.h | 23937 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 23938 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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D | stm32u5a5xx.h | 25244 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 25245 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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D | stm32u595xx.h | 24685 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF… macro 24686 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data…
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/hal_stm32-3.4.0/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xxq.h | 16943 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 16944 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h7a3xx.h | 16931 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 16932 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h7b0xx.h | 17411 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 17412 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h7b0xxq.h | 17423 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 17424 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h7b3xx.h | 17418 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 17419 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h7b3xxq.h | 17430 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 17431 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h742xx.h | 17778 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 17779 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h730xx.h | 18975 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18976 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h733xx.h | 18975 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18976 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h735xx.h | 18987 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18988 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h730xxq.h | 18987 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18988 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h723xx.h | 18488 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18489 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h725xx.h | 18500 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18501 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h745xg.h | 19061 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 19062 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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D | stm32h743xx.h | 18426 #define SPI_RXDR_RXDR_Msk (0xFFFFFFFFUL << SPI_RXDR_RXDR_Pos) /*!< 0xFFFFFFFF */ macro 18427 #define SPI_RXDR_RXDR SPI_RXDR_RXDR_Msk /* Receive Data Regi…
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