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Searched refs:SHIFT_TAB_OISx (Results 1 – 17 of 17) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_tim.h89 static const uint8_t SHIFT_TAB_OISx[] = variable
1652 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1653 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1803 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
1831 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_tim.h90 static const uint8_t SHIFT_TAB_OISx[] = variable
1634 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1635 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1785 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
1813 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_tim.h89 static const uint8_t SHIFT_TAB_OISx[] = variable
1703 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1704 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1854 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
1882 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_tim.h90 static const uint8_t SHIFT_TAB_OISx[] = variable
1682 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1683 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1833 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
1861 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2052 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2053 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2235 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2267 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2119 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2120 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2302 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2334 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2085 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2086 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2268 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2300 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2055 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2056 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2273 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2306 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
1950 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1951 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2133 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2165 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2082 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2083 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2265 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2297 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2140 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2141 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2323 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2355 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2042 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2043 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2225 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2257 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2120 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2121 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2303 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2335 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_tim.h97 static const uint8_t SHIFT_TAB_OISx[] = variable
2210 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2211 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2393 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2425 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h115 static const uint8_t SHIFT_TAB_OISx[] = variable
2438 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2439 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2631 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2665 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h113 static const uint8_t SHIFT_TAB_OISx[] = variable
2514 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2515 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2707 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2741 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h102 static const uint8_t SHIFT_TAB_OISx[] = variable
2697 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2698 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2890 …MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iCh… in LL_TIM_OC_SetIdleState()
2924 …return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel… in LL_TIM_OC_GetIdleState()