Searched refs:RCC_PLL1DIVR_PLL1R (Results 1 – 22 of 22) sorted by relevance
| /hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_rcc.c | 1298 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1811 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); in HAL_RCC_GetSysClockFreq()
1963 …pRCC_OscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Po… in HAL_RCC_GetOscConfig()
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| D | stm32u5xx_hal_rcc_ex.c | 1548 … RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/ |
| D | system_stm32u5xx.c | 335 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
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| D | system_stm32u5xx_s.c | 358 pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U ); in SystemCoreClockUpdate()
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| D | stm32u535xx.h | 14117 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u545xx.h | 14627 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u575xx.h | 15488 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u585xx.h | 16047 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u5a5xx.h | 17073 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u595xx.h | 16514 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u599xx.h | 20240 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| D | stm32u5a9xx.h | 20799 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk /*!< PLL1R[6:0]… macro
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_rcc.c | 941 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCC_OscConfig()
1579 …pOscInitStruct->PLL.PLLR = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) +… in HAL_RCC_GetOscConfig()
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| D | stm32h5xx_hal_rcc_ex.c | 2874 … RCC_PLL1DIVR_PLL1R) >> \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_rcc.h | 3885 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SYS()
4056 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4068 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
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| D | stm32u5xx_hal_rcc.h | 4426 RCC_PLL1DIVR_PLL1R), ( (((__PLL1N__) - 1U ) & RCC_PLL1DIVR_PLL1N) |\
4432 RCC_PLL1DIVR_PLL1R))); \
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_rcc.h | 4422 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4433 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
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| D | stm32h5xx_hal_rcc.h | 4567 … ((((__PLL1R__) - 1U) << RCC_PLL1DIVR_PLL1R_Pos) & RCC_PLL1DIVR_PLL1R))); \
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/ |
| D | stm32h503xx.h | 8983 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h562xx.h | 13360 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h563xx.h | 15444 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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| D | stm32h573xx.h | 15965 #define RCC_PLL1DIVR_PLL1R RCC_PLL1DIVR_PLL1R_Msk macro
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