Searched refs:RCC_PLL1CFGR_PLL1FRACEN (Results 1 – 24 of 24) sorted by relevance
| /hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/ |
| D | system_stm32u5xx.c | 312 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
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| D | system_stm32u5xx_s.c | 335 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
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| D | stm32u535xx.h | 13995 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u545xx.h | 14505 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u575xx.h | 15366 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u585xx.h | 15925 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u5a5xx.h | 16951 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u595xx.h | 16392 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u599xx.h | 20118 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| D | stm32u5a9xx.h | 20677 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk /*!< PLL1 Fract… macro
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| /hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_rcc.h | 4211 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Enable()
4222 …return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN) == RCC_PLL1CFGR_PLL1FRACEN) ? 1UL : 0UL); in LL_RCC_PLL1FRACN_IsEnabled()
4233 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Disable()
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| D | stm32u5xx_hal_rcc.h | 4381 #define __HAL_RCC_PLL_FRACN_ENABLE() SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN)
4383 #define __HAL_RCC_PLL_FRACN_DISABLE() CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN)
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_rcc.h | 4463 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Enable()
4473 …return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN) == RCC_PLL1CFGR_PLL1FRACEN) ? 1UL : 0UL); in LL_RCC_PLL1FRACN_IsEnabled()
4483 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Disable()
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| D | stm32h5xx_hal_rcc.h | 4523 #define __HAL_RCC_PLL1_FRACN_ENABLE() SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN)
4525 #define __HAL_RCC_PLL1_FRACN_DISABLE() CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN)
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/ |
| D | system_stm32h5xx.c | 347 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
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| D | system_stm32h5xx_s.c | 361 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
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| D | stm32h503xx.h | 8889 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk macro
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| D | stm32h562xx.h | 13230 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk macro
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| D | stm32h563xx.h | 15314 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk macro
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| D | stm32h573xx.h | 15835 #define RCC_PLL1CFGR_PLL1FRACEN RCC_PLL1CFGR_PLL1FRACEN_Msk macro
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| /hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_rcc.c | 1404 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
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| D | stm32h5xx_hal_rcc_ex.c | 2793 pll1fracen = RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN; in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_rcc.c | 1786 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
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| D | stm32u5xx_hal_rcc_ex.c | 1496 pll1fracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCCEx_GetPLL1ClockFreq()
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