Home
last modified time | relevance | path

Searched refs:RCC_APB1ENR_CANEN (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2267 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CANEN);\
2269 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CANEN);\
2273 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CANEN))
2607 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CANEN)) != RESET)
2609 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CANEN)) == RESET)
Dstm32f3xx_ll_bus.h164 #define LL_APB1_GRP1_PERIPH_CAN RCC_APB1ENR_CANEN
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc_ex.h1187 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CANEN);\
1189 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CANEN);\
1192 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CANEN))
Dstm32f0xx_ll_bus.h136 #define LL_APB1_GRP1_PERIPH_CAN RCC_APB1ENR_CANEN
/hal_stm32-3.4.0/stm32cube/stm32f0xx/soc/
Dstm32f042x6.h7470 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f048xx.h7446 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f091xc.h8433 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f078xx.h7938 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f098xx.h8409 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f072xb.h7962 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
/hal_stm32-3.4.0/stm32cube/stm32f3xx/soc/
Dstm32f373xc.h8093 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f378xx.h7997 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f302xc.h9004 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f302x8.h8739 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f328xx.h8688 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f303x8.h8712 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f358xx.h9507 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f302xe.h10622 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f303xc.h9604 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f303xe.h11203 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f398xx.h11104 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro
Dstm32f334x8.h11814 #define RCC_APB1ENR_CANEN RCC_APB1ENR_CANEN_Msk /*!< CAN clock enabl… macro