OCNState (reference) in projects: hal_stm32-3.4.0

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Searched refs:OCNState (Results 1 – 25 of 34) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_ll_tim.c	393 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 819 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 855 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 898 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 934 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 977 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1013 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1057 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1092 MODIFY_REG(tmpccer, TIM_CCER_CC4NE, TIM_OCInitStruct->OCNState << 14U); in OC4Config() 1135 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() [all …]
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
D	stm32h5xx_ll_tim.c	428 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 854 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 890 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 933 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 969 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 1012 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1048 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1092 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1127 MODIFY_REG(tmpccer, TIM_CCER_CC4NE, TIM_OCInitStruct->OCNState << 14U); in OC4Config() 1170 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() [all …]
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/src/
D	stm32g4xx_ll_tim.c	391 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 820 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 856 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 899 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 935 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 978 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1014 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1058 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1093 MODIFY_REG(tmpccer, TIM_CCER_CC4NE, TIM_OCInitStruct->OCNState << 14U); in OC4Config() 1136 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() [all …]
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/src/
D	stm32c0xx_ll_tim.c	350 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 779 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 815 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 858 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 894 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 937 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 973 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1017 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1086 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1147 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/src/
D	stm32wlxx_ll_tim.c	339 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 765 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 801 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 844 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 880 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 923 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 959 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1003 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1072 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1133 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/src/
D	stm32l5xx_ll_tim.c	374 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 800 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 836 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 879 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 915 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 958 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 994 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1038 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1107 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1168 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/src/
D	stm32wbxx_ll_tim.c	343 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 769 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 805 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 848 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 884 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 927 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 963 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1007 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1076 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1137 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/src/
D	stm32f7xx_ll_tim.c	407 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 830 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 866 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 909 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 945 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 988 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1024 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1068 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1137 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1198 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/src/
D	stm32l4xx_ll_tim.c	380 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 803 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 839 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 882 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 918 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 961 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 997 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1041 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1110 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1171 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/src/
D	stm32g0xx_ll_tim.c	383 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 812 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 848 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 891 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 927 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 970 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1006 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1050 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1119 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1180 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/src/
D	stm32f3xx_ll_tim.c	451 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 884 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 920 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 963 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 999 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 1045 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1081 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1128 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1202 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1264 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/src/
D	stm32mp1xx_ll_tim.c	415 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 835 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 871 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 914 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 950 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 993 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1029 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1073 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1142 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1203 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/src/
D	stm32h7xx_ll_tim.c	419 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 858 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 894 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 937 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 973 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 1016 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 1052 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1096 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config() 1165 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC5Config() 1226 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC6Config()
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/src/
D	stm32f0xx_ll_tim.c	340 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 731 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 767 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 810 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 846 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 889 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 925 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 969 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config()
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/src/
D	stm32f2xx_ll_tim.c	362 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 753 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 789 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 832 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 868 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 911 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 947 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 991 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config()
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/src/
D	stm32f1xx_ll_tim.c	382 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 771 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 807 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 850 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 886 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 929 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 965 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 1009 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config()
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/src/
D	stm32f4xx_ll_tim.c	361 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; in LL_TIM_OC_StructInit() 752 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC1Config() 788 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); in OC1Config() 831 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC2Config() 867 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); in OC2Config() 910 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC3Config() 946 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); in OC3Config() 990 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); in OC4Config()
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_ll_tim.h	`240 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
D	stm32f1xx_ll_tim.h	`238 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
D	stm32f4xx_ll_tim.h	`243 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
D	stm32f2xx_ll_tim.h	`244 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_tim.h	`274 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_tim.h	`265 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_ll_tim.h	`278 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
D	stm32f3xx_ll_tim.h	`279 uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. member`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0