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Searched refs:LL_USART_PHASE_1EDGE (Results 1 – 25 of 38) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_usart.c87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
348 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_usart.c96 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
345 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_usart.c90 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
416 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_usart.c87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
356 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_usart.c84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
397 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_usart.c84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
393 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_usart.c85 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
403 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_usart.c84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
415 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_usart.c98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
420 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_usart.c98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
400 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_usart.c87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
397 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_usart.c74 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
413 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_usart.c91 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
488 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_usart.c87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
442 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_usart.c87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
425 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_usart.c93 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
450 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_usart.c83 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
476 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_usart.c99 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
469 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_usart.c99 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
521 …USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when … in LL_USART_ClockStructInit()
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_usart.h263 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_usart.h260 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_usart.h261 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro
/hal_stm32-3.4.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_usart.h261 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_usart.h309 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_usart.h321 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti… macro

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