1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_dmamux.h
4 * @author MCD Application Team
5 * @brief Header file of DMAMUX LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L4xx_LL_DMAMUX_H
21 #define STM32L4xx_LL_DMAMUX_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l4xx.h"
29
30 /** @addtogroup STM32L4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (DMAMUX1)
35
36 /** @defgroup DMAMUX_LL DMAMUX
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants
44 * @{
45 */
46 /* Define used to get DMAMUX CCR register size */
47 #define DMAMUX_CCR_SIZE 0x00000004UL
48
49 /* Define used to get DMAMUX RGCR register size */
50 #define DMAMUX_RGCR_SIZE 0x00000004UL
51 /**
52 * @}
53 */
54
55 /* Private macros ------------------------------------------------------------*/
56 /* Exported types ------------------------------------------------------------*/
57 /* Exported constants --------------------------------------------------------*/
58 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants
59 * @{
60 */
61 /** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines
62 * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function
63 * @{
64 */
65 #define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
66 #define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
67 #define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
68 #define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
69 #define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
70 #define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
71 #define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
72 #define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
73 #define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
74 #define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
75 #define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
76 #define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
77 #define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
78 #define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
79 #define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
80 #define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
81 #define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
82 #define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
83 /**
84 * @}
85 */
86
87 /** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines
88 * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function
89 * @{
90 */
91 #define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
92 #define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
93 #define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
94 #define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
95 #define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
96 #define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
97 #define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
98 #define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
99 #define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
100 #define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
101 #define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
102 #define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
103 #define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
104 #define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
105 #define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
106 #define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
107 #define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
108 #define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
109 /**
110 * @}
111 */
112
113 /** @defgroup DMAMUX_LL_EC_IT IT Defines
114 * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions
115 * @{
116 */
117 #define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */
118 #define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */
119 /**
120 * @}
121 */
122
123 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request
124 * @{
125 */
126 #define LL_DMAMUX_REQ_MEM2MEM 0U /*!< Memory to memory transfer */
127
128 #define LL_DMAMUX_REQ_GENERATOR0 1U /*!< DMAMUX request generator 0 */
129 #define LL_DMAMUX_REQ_GENERATOR1 2U /*!< DMAMUX request generator 1 */
130 #define LL_DMAMUX_REQ_GENERATOR2 3U /*!< DMAMUX request generator 2 */
131 #define LL_DMAMUX_REQ_GENERATOR3 4U /*!< DMAMUX request generator 3 */
132
133 #define LL_DMAMUX_REQ_ADC1 5U /*!< DMAMUX ADC1 request */
134
135 #if defined (ADC2)
136
137 #define LL_DMAMUX_REQ_ADC2 6U /*!< DMAMUX ADC1 request */
138
139 #define LL_DMAMUX_REQ_DAC1_CH1 7U /*!< DMAMUX DAC1 CH1 request */
140 #define LL_DMAMUX_REQ_DAC1_CH2 8U /*!< DMAMUX DAC1 CH2 request */
141
142 #define LL_DMAMUX_REQ_TIM6_UP 9U /*!< DMAMUX TIM6 UP request */
143 #define LL_DMAMUX_REQ_TIM7_UP 10U /*!< DMAMUX TIM7 UP request */
144
145 #define LL_DMAMUX_REQ_SPI1_RX 11U /*!< DMAMUX SPI1 RX request */
146 #define LL_DMAMUX_REQ_SPI1_TX 12U /*!< DMAMUX SPI1 TX request */
147 #define LL_DMAMUX_REQ_SPI2_RX 13U /*!< DMAMUX SPI2 RX request */
148 #define LL_DMAMUX_REQ_SPI2_TX 14U /*!< DMAMUX SPI2 TX request */
149 #define LL_DMAMUX_REQ_SPI3_RX 15U /*!< DMAMUX SPI3 RX request */
150 #define LL_DMAMUX_REQ_SPI3_TX 16U /*!< DMAMUX SPI3 TX request */
151
152 #define LL_DMAMUX_REQ_I2C1_RX 17U /*!< DMAMUX I2C1 RX request */
153 #define LL_DMAMUX_REQ_I2C1_TX 18U /*!< DMAMUX I2C1 TX request */
154 #define LL_DMAMUX_REQ_I2C2_RX 19U /*!< DMAMUX I2C2 RX request */
155 #define LL_DMAMUX_REQ_I2C2_TX 20U /*!< DMAMUX I2C2 TX request */
156 #define LL_DMAMUX_REQ_I2C3_RX 21U /*!< DMAMUX I2C3 RX request */
157 #define LL_DMAMUX_REQ_I2C3_TX 22U /*!< DMAMUX I2C3 TX request */
158 #define LL_DMAMUX_REQ_I2C4_RX 23U /*!< DMAMUX I2C4 RX request */
159 #define LL_DMAMUX_REQ_I2C4_TX 24U /*!< DMAMUX I2C4 TX request */
160
161 #define LL_DMAMUX_REQ_USART1_RX 25U /*!< DMAMUX USART1 RX request */
162 #define LL_DMAMUX_REQ_USART1_TX 26U /*!< DMAMUX USART1 TX request */
163 #define LL_DMAMUX_REQ_USART2_RX 27U /*!< DMAMUX USART2 RX request */
164 #define LL_DMAMUX_REQ_USART2_TX 28U /*!< DMAMUX USART2 TX request */
165 #define LL_DMAMUX_REQ_USART3_RX 29U /*!< DMAMUX USART3 RX request */
166 #define LL_DMAMUX_REQ_USART3_TX 30U /*!< DMAMUX USART3 TX request */
167
168 #define LL_DMAMUX_REQ_UART4_RX 31U /*!< DMAMUX UART4 RX request */
169 #define LL_DMAMUX_REQ_UART4_TX 32U /*!< DMAMUX UART4 TX request */
170 #define LL_DMAMUX_REQ_UART5_RX 33U /*!< DMAMUX UART5 RX request */
171 #define LL_DMAMUX_REQ_UART5_TX 34U /*!< DMAMUX UART5 TX request */
172
173 #define LL_DMAMUX_REQ_LPUART1_RX 35U /*!< DMAMUX LPUART1 RX request */
174 #define LL_DMAMUX_REQ_LPUART1_TX 36U /*!< DMAMUX LPUART1 TX request */
175
176 #define LL_DMAMUX_REQ_SAI1_A 37U /*!< DMAMUX SAI1 A request */
177 #define LL_DMAMUX_REQ_SAI1_B 38U /*!< DMAMUX SAI1 B request */
178 #define LL_DMAMUX_REQ_SAI2_A 39U /*!< DMAMUX SAI2 A request */
179 #define LL_DMAMUX_REQ_SAI2_B 40U /*!< DMAMUX SAI2 B request */
180
181 #define LL_DMAMUX_REQ_OSPI1 41U /*!< DMAMUX OCTOSPI1 request */
182 #define LL_DMAMUX_REQ_OSPI2 42U /*!< DMAMUX OCTOSPI2 request */
183
184 #define LL_DMAMUX_REQ_TIM1_CH1 43U /*!< DMAMUX TIM1 CH1 request */
185 #define LL_DMAMUX_REQ_TIM1_CH2 44U /*!< DMAMUX TIM1 CH2 request */
186 #define LL_DMAMUX_REQ_TIM1_CH3 45U /*!< DMAMUX TIM1 CH3 request */
187 #define LL_DMAMUX_REQ_TIM1_CH4 46U /*!< DMAMUX TIM1 CH4 request */
188 #define LL_DMAMUX_REQ_TIM1_UP 47U /*!< DMAMUX TIM1 UP request */
189 #define LL_DMAMUX_REQ_TIM1_TRIG 48U /*!< DMAMUX TIM1 TRIG request */
190 #define LL_DMAMUX_REQ_TIM1_COM 49U /*!< DMAMUX TIM1 COM request */
191
192 #define LL_DMAMUX_REQ_TIM8_CH1 50U /*!< DMAMUX TIM8 CH1 request */
193 #define LL_DMAMUX_REQ_TIM8_CH2 51U /*!< DMAMUX TIM8 CH2 request */
194 #define LL_DMAMUX_REQ_TIM8_CH3 52U /*!< DMAMUX TIM8 CH3 request */
195 #define LL_DMAMUX_REQ_TIM8_CH4 53U /*!< DMAMUX TIM8 CH4 request */
196 #define LL_DMAMUX_REQ_TIM8_UP 54U /*!< DMAMUX TIM8 UP request */
197 #define LL_DMAMUX_REQ_TIM8_TRIG 55U /*!< DMAMUX TIM8 TRIG request */
198 #define LL_DMAMUX_REQ_TIM8_COM 56U /*!< DMAMUX TIM8 COM request */
199
200 #define LL_DMAMUX_REQ_TIM2_CH1 57U /*!< DMAMUX TIM2 CH1 request */
201 #define LL_DMAMUX_REQ_TIM2_CH2 58U /*!< DMAMUX TIM2 CH2 request */
202 #define LL_DMAMUX_REQ_TIM2_CH3 59U /*!< DMAMUX TIM2 CH3 request */
203 #define LL_DMAMUX_REQ_TIM2_CH4 60U /*!< DMAMUX TIM2 CH4 request */
204 #define LL_DMAMUX_REQ_TIM2_UP 61U /*!< DMAMUX TIM2 UP request */
205
206 #define LL_DMAMUX_REQ_TIM3_CH1 62U /*!< DMAMUX TIM3 CH1 request */
207 #define LL_DMAMUX_REQ_TIM3_CH2 63U /*!< DMAMUX TIM3 CH2 request */
208 #define LL_DMAMUX_REQ_TIM3_CH3 64U /*!< DMAMUX TIM3 CH3 request */
209 #define LL_DMAMUX_REQ_TIM3_CH4 65U /*!< DMAMUX TIM3 CH4 request */
210 #define LL_DMAMUX_REQ_TIM3_UP 66U /*!< DMAMUX TIM3 UP request */
211 #define LL_DMAMUX_REQ_TIM3_TRIG 67U /*!< DMAMUX TIM3 TRIG request */
212
213 #define LL_DMAMUX_REQ_TIM4_CH1 68U /*!< DMAMUX TIM4 CH1 request */
214 #define LL_DMAMUX_REQ_TIM4_CH2 69U /*!< DMAMUX TIM4 CH2 request */
215 #define LL_DMAMUX_REQ_TIM4_CH3 70U /*!< DMAMUX TIM4 CH3 request */
216 #define LL_DMAMUX_REQ_TIM4_CH4 71U /*!< DMAMUX TIM4 CH4 request */
217 #define LL_DMAMUX_REQ_TIM4_UP 72U /*!< DMAMUX TIM4 UP request */
218
219 #define LL_DMAMUX_REQ_TIM5_CH1 73U /*!< DMAMUX TIM5 CH1 request */
220 #define LL_DMAMUX_REQ_TIM5_CH2 74U /*!< DMAMUX TIM5 CH2 request */
221 #define LL_DMAMUX_REQ_TIM5_CH3 75U /*!< DMAMUX TIM5 CH3 request */
222 #define LL_DMAMUX_REQ_TIM5_CH4 76U /*!< DMAMUX TIM5 CH4 request */
223 #define LL_DMAMUX_REQ_TIM5_UP 77U /*!< DMAMUX TIM5 UP request */
224 #define LL_DMAMUX_REQ_TIM5_TRIG 78U /*!< DMAMUX TIM5 TRIG request */
225 #define LL_DMAMUX_REQ_TIM15_CH1 79U /*!< DMAMUX TIM15 CH1 request */
226 #define LL_DMAMUX_REQ_TIM15_UP 80U /*!< DMAMUX TIM15 UP request */
227 #define LL_DMAMUX_REQ_TIM15_TRIG 81U /*!< DMAMUX TIM15 TRIG request */
228 #define LL_DMAMUX_REQ_TIM15_COM 82U /*!< DMAMUX TIM15 COM request */
229
230 #define LL_DMAMUX_REQ_TIM16_CH1 83U /*!< DMAMUX TIM16 CH1 request */
231 #define LL_DMAMUX_REQ_TIM16_UP 84U /*!< DMAMUX TIM16 UP request */
232 #define LL_DMAMUX_REQ_TIM17_CH1 85U /*!< DMAMUX TIM17 CH1 request */
233 #define LL_DMAMUX_REQ_TIM17_UP 86U /*!< DMAMUX TIM17 UP request */
234
235 #define LL_DMAMUX_REQ_DFSDM1_FLT0 87U /*!< DMAMUX DFSDM1_FLT0 request */
236 #define LL_DMAMUX_REQ_DFSDM1_FLT1 88U /*!< DMAMUX DFSDM1_FLT1 request */
237 #define LL_DMAMUX_REQ_DFSDM1_FLT2 89U /*!< DMAMUX DFSDM1_FLT2 request */
238 #define LL_DMAMUX_REQ_DFSDM1_FLT3 90U /*!< DMAMUX DFSDM1_FLT3 request */
239
240 #define LL_DMAMUX_REQ_DCMI 91U /*!< DMAMUX DCMI request */
241 #define LL_DMAMUX_REQ_DCMI_PSSI 91U /*!< DMAMUX PSSI request */
242
243 #define LL_DMAMUX_REQ_AES_IN 92U /*!< DMAMUX AES_IN request */
244 #define LL_DMAMUX_REQ_AES_OUT 93U /*!< DMAMUX AES_OUT request */
245
246 #define LL_DMAMUX_REQ_HASH_IN 94U /*!< DMAMUX HASH_IN request */
247
248 #else
249
250 #define LL_DMAMUX_REQ_DAC1_CH1 6U /*!< DMAMUX DAC1 CH1 request */
251 #define LL_DMAMUX_REQ_DAC1_CH2 7U /*!< DMAMUX DAC1 CH2 request */
252
253 #define LL_DMAMUX_REQ_TIM6_UP 8U /*!< DMAMUX TIM6 UP request */
254 #define LL_DMAMUX_REQ_TIM7_UP 9U /*!< DMAMUX TIM7 UP request */
255
256 #define LL_DMAMUX_REQ_SPI1_RX 10U /*!< DMAMUX SPI1 RX request */
257 #define LL_DMAMUX_REQ_SPI1_TX 11U /*!< DMAMUX SPI1 TX request */
258 #define LL_DMAMUX_REQ_SPI2_RX 12U /*!< DMAMUX SPI2 RX request */
259 #define LL_DMAMUX_REQ_SPI2_TX 13U /*!< DMAMUX SPI2 TX request */
260 #define LL_DMAMUX_REQ_SPI3_RX 14U /*!< DMAMUX SPI3 RX request */
261 #define LL_DMAMUX_REQ_SPI3_TX 15U /*!< DMAMUX SPI3 TX request */
262
263 #define LL_DMAMUX_REQ_I2C1_RX 16U /*!< DMAMUX I2C1 RX request */
264 #define LL_DMAMUX_REQ_I2C1_TX 17U /*!< DMAMUX I2C1 TX request */
265 #define LL_DMAMUX_REQ_I2C2_RX 18U /*!< DMAMUX I2C2 RX request */
266 #define LL_DMAMUX_REQ_I2C2_TX 19U /*!< DMAMUX I2C2 TX request */
267 #define LL_DMAMUX_REQ_I2C3_RX 20U /*!< DMAMUX I2C3 RX request */
268 #define LL_DMAMUX_REQ_I2C3_TX 21U /*!< DMAMUX I2C3 TX request */
269 #define LL_DMAMUX_REQ_I2C4_RX 22U /*!< DMAMUX I2C4 RX request */
270 #define LL_DMAMUX_REQ_I2C4_TX 23U /*!< DMAMUX I2C4 TX request */
271
272 #define LL_DMAMUX_REQ_USART1_RX 24U /*!< DMAMUX USART1 RX request */
273 #define LL_DMAMUX_REQ_USART1_TX 25U /*!< DMAMUX USART1 TX request */
274 #define LL_DMAMUX_REQ_USART2_RX 26U /*!< DMAMUX USART2 RX request */
275 #define LL_DMAMUX_REQ_USART2_TX 27U /*!< DMAMUX USART2 TX request */
276 #define LL_DMAMUX_REQ_USART3_RX 28U /*!< DMAMUX USART3 RX request */
277 #define LL_DMAMUX_REQ_USART3_TX 29U /*!< DMAMUX USART3 TX request */
278
279 #define LL_DMAMUX_REQ_UART4_RX 30U /*!< DMAMUX UART4 RX request */
280 #define LL_DMAMUX_REQ_UART4_TX 31U /*!< DMAMUX UART4 TX request */
281 #define LL_DMAMUX_REQ_UART5_RX 32U /*!< DMAMUX UART5 RX request */
282 #define LL_DMAMUX_REQ_UART5_TX 33U /*!< DMAMUX UART5 TX request */
283
284 #define LL_DMAMUX_REQ_LPUART1_RX 34U /*!< DMAMUX LPUART1 RX request */
285 #define LL_DMAMUX_REQ_LPUART1_TX 35U /*!< DMAMUX LPUART1 TX request */
286
287 #define LL_DMAMUX_REQ_SAI1_A 36U /*!< DMAMUX SAI1 A request */
288 #define LL_DMAMUX_REQ_SAI1_B 37U /*!< DMAMUX SAI1 B request */
289 #define LL_DMAMUX_REQ_SAI2_A 38U /*!< DMAMUX SAI2 A request */
290 #define LL_DMAMUX_REQ_SAI2_B 39U /*!< DMAMUX SAI2 B request */
291
292 #define LL_DMAMUX_REQ_OSPI1 40U /*!< DMAMUX OCTOSPI1 request */
293 #define LL_DMAMUX_REQ_OSPI2 41U /*!< DMAMUX OCTOSPI2 request */
294
295 #define LL_DMAMUX_REQ_TIM1_CH1 42U /*!< DMAMUX TIM1 CH1 request */
296 #define LL_DMAMUX_REQ_TIM1_CH2 43U /*!< DMAMUX TIM1 CH2 request */
297 #define LL_DMAMUX_REQ_TIM1_CH3 44U /*!< DMAMUX TIM1 CH3 request */
298 #define LL_DMAMUX_REQ_TIM1_CH4 45U /*!< DMAMUX TIM1 CH4 request */
299 #define LL_DMAMUX_REQ_TIM1_UP 46U /*!< DMAMUX TIM1 UP request */
300 #define LL_DMAMUX_REQ_TIM1_TRIG 47U /*!< DMAMUX TIM1 TRIG request */
301 #define LL_DMAMUX_REQ_TIM1_COM 48U /*!< DMAMUX TIM1 COM request */
302
303 #define LL_DMAMUX_REQ_TIM8_CH1 49U /*!< DMAMUX TIM8 CH1 request */
304 #define LL_DMAMUX_REQ_TIM8_CH2 50U /*!< DMAMUX TIM8 CH2 request */
305 #define LL_DMAMUX_REQ_TIM8_CH3 51U /*!< DMAMUX TIM8 CH3 request */
306 #define LL_DMAMUX_REQ_TIM8_CH4 52U /*!< DMAMUX TIM8 CH4 request */
307 #define LL_DMAMUX_REQ_TIM8_UP 53U /*!< DMAMUX TIM8 UP request */
308 #define LL_DMAMUX_REQ_TIM8_TRIG 54U /*!< DMAMUX TIM8 TRIG request */
309 #define LL_DMAMUX_REQ_TIM8_COM 55U /*!< DMAMUX TIM8 COM request */
310
311 #define LL_DMAMUX_REQ_TIM2_CH1 56U /*!< DMAMUX TIM2 CH1 request */
312 #define LL_DMAMUX_REQ_TIM2_CH2 57U /*!< DMAMUX TIM2 CH2 request */
313 #define LL_DMAMUX_REQ_TIM2_CH3 58U /*!< DMAMUX TIM2 CH3 request */
314 #define LL_DMAMUX_REQ_TIM2_CH4 59U /*!< DMAMUX TIM2 CH4 request */
315 #define LL_DMAMUX_REQ_TIM2_UP 60U /*!< DMAMUX TIM2 UP request */
316
317 #define LL_DMAMUX_REQ_TIM3_CH1 61U /*!< DMAMUX TIM3 CH1 request */
318 #define LL_DMAMUX_REQ_TIM3_CH2 62U /*!< DMAMUX TIM3 CH2 request */
319 #define LL_DMAMUX_REQ_TIM3_CH3 63U /*!< DMAMUX TIM3 CH3 request */
320 #define LL_DMAMUX_REQ_TIM3_CH4 64U /*!< DMAMUX TIM3 CH4 request */
321 #define LL_DMAMUX_REQ_TIM3_UP 65U /*!< DMAMUX TIM3 UP request */
322 #define LL_DMAMUX_REQ_TIM3_TRIG 66U /*!< DMAMUX TIM3 TRIG request */
323
324 #define LL_DMAMUX_REQ_TIM4_CH1 67U /*!< DMAMUX TIM4 CH1 request */
325 #define LL_DMAMUX_REQ_TIM4_CH2 68U /*!< DMAMUX TIM4 CH2 request */
326 #define LL_DMAMUX_REQ_TIM4_CH3 69U /*!< DMAMUX TIM4 CH3 request */
327 #define LL_DMAMUX_REQ_TIM4_CH4 70U /*!< DMAMUX TIM4 CH4 request */
328 #define LL_DMAMUX_REQ_TIM4_UP 71U /*!< DMAMUX TIM4 UP request */
329
330 #define LL_DMAMUX_REQ_TIM5_CH1 72U /*!< DMAMUX TIM5 CH1 request */
331 #define LL_DMAMUX_REQ_TIM5_CH2 73U /*!< DMAMUX TIM5 CH2 request */
332 #define LL_DMAMUX_REQ_TIM5_CH3 74U /*!< DMAMUX TIM5 CH3 request */
333 #define LL_DMAMUX_REQ_TIM5_CH4 75U /*!< DMAMUX TIM5 CH4 request */
334 #define LL_DMAMUX_REQ_TIM5_UP 76U /*!< DMAMUX TIM5 UP request */
335 #define LL_DMAMUX_REQ_TIM5_TRIG 77U /*!< DMAMUX TIM5 TRIG request */
336 #define LL_DMAMUX_REQ_TIM15_CH1 78U /*!< DMAMUX TIM15 CH1 request */
337 #define LL_DMAMUX_REQ_TIM15_UP 79U /*!< DMAMUX TIM15 UP request */
338 #define LL_DMAMUX_REQ_TIM15_TRIG 80U /*!< DMAMUX TIM15 TRIG request */
339 #define LL_DMAMUX_REQ_TIM15_COM 81U /*!< DMAMUX TIM15 COM request */
340
341 #define LL_DMAMUX_REQ_TIM16_CH1 82U /*!< DMAMUX TIM16 CH1 request */
342 #define LL_DMAMUX_REQ_TIM16_UP 83U /*!< DMAMUX TIM16 UP request */
343 #define LL_DMAMUX_REQ_TIM17_CH1 84U /*!< DMAMUX TIM17 CH1 request */
344 #define LL_DMAMUX_REQ_TIM17_UP 85U /*!< DMAMUX TIM17 UP request */
345
346 #define LL_DMAMUX_REQ_DFSDM1_FLT0 86U /*!< DMAMUX DFSDM1_FLT0 request */
347 #define LL_DMAMUX_REQ_DFSDM1_FLT1 87U /*!< DMAMUX DFSDM1_FLT1 request */
348 #define LL_DMAMUX_REQ_DFSDM1_FLT2 88U /*!< DMAMUX DFSDM1_FLT2 request */
349 #define LL_DMAMUX_REQ_DFSDM1_FLT3 89U /*!< DMAMUX DFSDM1_FLT3 request */
350
351 #define LL_DMAMUX_REQ_DCMI 90U /*!< DMAMUX DCMI request */
352
353 #define LL_DMAMUX_REQ_AES_IN 91U /*!< DMAMUX AES_IN request */
354 #define LL_DMAMUX_REQ_AES_OUT 92U /*!< DMAMUX AES_OUT request */
355
356 #define LL_DMAMUX_REQ_HASH_IN 93U /*!< DMAMUX HASH_IN request */
357
358 #endif
359
360 /**
361 * @}
362 */
363
364 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel
365 * @{
366 */
367 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */
368 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */
369 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */
370 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */
371 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */
372 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */
373 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */
374 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA2 Channel 1 */
375 #define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 2 */
376 #define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 3 */
377 #define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 4 */
378 #define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 5 */
379 #define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 6 */
380 #define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 7 */
381 /**
382 * @}
383 */
384
385 /** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity
386 * @{
387 */
388 #define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */
389 #define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */
390 #define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */
391 #define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */
392 /**
393 * @}
394 */
395
396 /** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event
397 * @{
398 */
399 #define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */
400 #define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */
401 #define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */
402 #define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */
403 #define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */
404 #define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */
405 #define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */
406 #define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */
407 #define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */
408 #define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */
409 #define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */
410 #define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */
411 #define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */
412 #define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */
413 #define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */
414 #define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */
415 #define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */
416 #define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */
417 #define LL_DMAMUX_SYNC_DMAMUX_CH2 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DMAMUX channel2 Event */
418 #define LL_DMAMUX_SYNC_DMAMUX_CH3 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel3 Event */
419 #define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM1 Output */
420 #define LL_DMAMUX_SYNC_LPTIM2_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LPTIM2 Output */
421 #define LL_DMAMUX_SYNC_DSI_TE (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DSI Tearing Effect */
422 #define LL_DMAMUX_SYNC_DSI_REFRESH_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DSI End of Refresh */
423 #define LL_DMAMUX_SYNC_DMA2D_TX_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3) /*!< Synchronization signal from DMA2D End of Transfer */
424 #define LL_DMAMUX_SYNC_LTDC_LINE_IT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LTDC Line Interrupt */
425 /**
426 * @}
427 */
428
429 /** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel
430 * @{
431 */
432 #define LL_DMAMUX_REQ_GEN_0 0x00000000U
433 #define LL_DMAMUX_REQ_GEN_1 0x00000001U
434 #define LL_DMAMUX_REQ_GEN_2 0x00000002U
435 #define LL_DMAMUX_REQ_GEN_3 0x00000003U
436 /**
437 * @}
438 */
439
440 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity
441 * @{
442 */
443 #define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */
444 #define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */
445 #define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */
446 #define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */
447 /**
448 * @}
449 */
450
451 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation
452 * @{
453 */
454 #define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */
455 #define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */
456 #define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */
457 #define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */
458 #define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */
459 #define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */
460 #define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */
461 #define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */
462 #define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */
463 #define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */
464 #define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */
465 #define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */
466 #define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */
467 #define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */
468 #define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */
469 #define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */
470 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */
471 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */
472 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH2 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DMAMUX channel2 Event */
473 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH3 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel3 Event */
474 #define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM1 Output */
475 #define LL_DMAMUX_REQ_GEN_LPTIM2_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LPTIM2 Output */
476 #define LL_DMAMUX_REQ_GEN_DSI_TE (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DSI Tearing Effect */
477 #define LL_DMAMUX_REQ_GEN_DSI_REFRESH_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DSI End of Refresh */
478 #define LL_DMAMUX_REQ_GEN_DMA2D_TX_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3) /*!< Request signal generation from DMA2D End of Transfer */
479 #define LL_DMAMUX_REQ_GEN_LTDC_LINE_IT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LTDC Line Interrupt */
480 /**
481 * @}
482 */
483
484 /**
485 * @}
486 */
487
488 /* Exported macro ------------------------------------------------------------*/
489 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros
490 * @{
491 */
492
493 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros
494 * @{
495 */
496 /**
497 * @brief Write a value in DMAMUX register
498 * @param __INSTANCE__ DMAMUX Instance
499 * @param __REG__ Register to be written
500 * @param __VALUE__ Value to be written in the register
501 * @retval None
502 */
503 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
504
505 /**
506 * @brief Read a value in DMAMUX register
507 * @param __INSTANCE__ DMAMUX Instance
508 * @param __REG__ Register to be read
509 * @retval Register value
510 */
511 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
512 /**
513 * @}
514 */
515
516 /**
517 * @}
518 */
519
520 /* Exported functions --------------------------------------------------------*/
521 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions
522 * @{
523 */
524
525 /** @defgroup DMAMUX_LL_EF_Configuration Configuration
526 * @{
527 */
528 /**
529 * @brief Set DMAMUX request ID for DMAMUX Channel x.
530 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
531 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
532 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID
533 * @param DMAMUXx DMAMUXx Instance
534 * @param Channel This parameter can be one of the following values:
535 * @arg @ref LL_DMAMUX_CHANNEL_0
536 * @arg @ref LL_DMAMUX_CHANNEL_1
537 * @arg @ref LL_DMAMUX_CHANNEL_2
538 * @arg @ref LL_DMAMUX_CHANNEL_3
539 * @arg @ref LL_DMAMUX_CHANNEL_4
540 * @arg @ref LL_DMAMUX_CHANNEL_5
541 * @arg @ref LL_DMAMUX_CHANNEL_6
542 * @arg @ref LL_DMAMUX_CHANNEL_7
543 * @arg @ref LL_DMAMUX_CHANNEL_8
544 * @arg @ref LL_DMAMUX_CHANNEL_9
545 * @arg @ref LL_DMAMUX_CHANNEL_10
546 * @arg @ref LL_DMAMUX_CHANNEL_11
547 * @arg @ref LL_DMAMUX_CHANNEL_12
548 * @arg @ref LL_DMAMUX_CHANNEL_13
549 * @param Request This parameter can be one of the following values:
550 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
551 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
552 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
553 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
554 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
555 * @arg @ref LL_DMAMUX_REQ_ADC1
556 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
557 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
558 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
559 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
560 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
561 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
562 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
563 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
564 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
565 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
566 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
567 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
568 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
569 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
570 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
571 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
572 * @arg @ref LL_DMAMUX_REQ_I2C4_RX
573 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
574 * @arg @ref LL_DMAMUX_REQ_USART1_RX
575 * @arg @ref LL_DMAMUX_REQ_USART1_TX
576 * @arg @ref LL_DMAMUX_REQ_USART2_RX
577 * @arg @ref LL_DMAMUX_REQ_USART2_TX
578 * @arg @ref LL_DMAMUX_REQ_USART3_RX
579 * @arg @ref LL_DMAMUX_REQ_USART3_TX
580 * @arg @ref LL_DMAMUX_REQ_UART4_RX
581 * @arg @ref LL_DMAMUX_REQ_UART4_TX
582 * @arg @ref LL_DMAMUX_REQ_UART5_RX
583 * @arg @ref LL_DMAMUX_REQ_UART5_TX
584 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
585 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
586 * @arg @ref LL_DMAMUX_REQ_SAI1_A
587 * @arg @ref LL_DMAMUX_REQ_SAI1_B
588 * @arg @ref LL_DMAMUX_REQ_SAI2_A
589 * @arg @ref LL_DMAMUX_REQ_SAI2_B
590 * @arg @ref LL_DMAMUX_REQ_OSPI1
591 * @arg @ref LL_DMAMUX_REQ_OSPI2
592 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
593 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
594 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
595 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
596 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
597 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
598 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
599 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
600 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
601 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
602 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
603 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
604 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
605 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
606 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
607 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
608 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
609 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
610 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
611 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
612 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
613 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
614 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
615 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
616 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
617 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
618 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
619 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
620 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
621 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
622 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1
623 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2
624 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3
625 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4
626 * @arg @ref LL_DMAMUX_REQ_TIM5_UP
627 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG
628 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
629 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
630 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
631 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
632 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
633 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
634 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
635 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
636 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0
637 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1
638 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2
639 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3
640 * @arg @ref LL_DMAMUX_REQ_DCMI
641 * @arg @ref LL_DMAMUX_REQ_AES_IN
642 * @arg @ref LL_DMAMUX_REQ_AES_OUT
643 * @arg @ref LL_DMAMUX_REQ_HASH_IN
644 * @retval None
645 */
LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Request)646 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
647 {
648 (void)(DMAMUXx);
649 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request);
650 }
651
652 /**
653 * @brief Get DMAMUX request ID for DMAMUX Channel x.
654 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
655 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
656 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID
657 * @param DMAMUXx DMAMUXx Instance
658 * @param Channel This parameter can be one of the following values:
659 * @arg @ref LL_DMAMUX_CHANNEL_0
660 * @arg @ref LL_DMAMUX_CHANNEL_1
661 * @arg @ref LL_DMAMUX_CHANNEL_2
662 * @arg @ref LL_DMAMUX_CHANNEL_3
663 * @arg @ref LL_DMAMUX_CHANNEL_4
664 * @arg @ref LL_DMAMUX_CHANNEL_5
665 * @arg @ref LL_DMAMUX_CHANNEL_6
666 * @arg @ref LL_DMAMUX_CHANNEL_7
667 * @arg @ref LL_DMAMUX_CHANNEL_8
668 * @arg @ref LL_DMAMUX_CHANNEL_9
669 * @arg @ref LL_DMAMUX_CHANNEL_10
670 * @arg @ref LL_DMAMUX_CHANNEL_11
671 * @arg @ref LL_DMAMUX_CHANNEL_12
672 * @arg @ref LL_DMAMUX_CHANNEL_13
673 * @retval Returned value can be one of the following values:
674 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
675 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
676 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
677 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
678 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
679 * @arg @ref LL_DMAMUX_REQ_ADC1
680 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
681 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
682 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
683 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
684 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
685 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
686 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
687 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
688 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
689 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
690 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
691 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
692 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
693 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
694 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
695 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
696 * @arg @ref LL_DMAMUX_REQ_I2C4_RX
697 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
698 * @arg @ref LL_DMAMUX_REQ_USART1_RX
699 * @arg @ref LL_DMAMUX_REQ_USART1_TX
700 * @arg @ref LL_DMAMUX_REQ_USART2_RX
701 * @arg @ref LL_DMAMUX_REQ_USART2_TX
702 * @arg @ref LL_DMAMUX_REQ_USART3_RX
703 * @arg @ref LL_DMAMUX_REQ_USART3_TX
704 * @arg @ref LL_DMAMUX_REQ_UART4_RX
705 * @arg @ref LL_DMAMUX_REQ_UART4_TX
706 * @arg @ref LL_DMAMUX_REQ_UART5_RX
707 * @arg @ref LL_DMAMUX_REQ_UART5_TX
708 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
709 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
710 * @arg @ref LL_DMAMUX_REQ_SAI1_A
711 * @arg @ref LL_DMAMUX_REQ_SAI1_B
712 * @arg @ref LL_DMAMUX_REQ_SAI2_A
713 * @arg @ref LL_DMAMUX_REQ_SAI2_B
714 * @arg @ref LL_DMAMUX_REQ_OSPI1
715 * @arg @ref LL_DMAMUX_REQ_OSPI2
716 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
717 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
718 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
719 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
720 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
721 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
722 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
723 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
724 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
725 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
726 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
727 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
728 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
729 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
730 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
731 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
732 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
733 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
734 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
735 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
736 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
737 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
738 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
739 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
740 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
741 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
742 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
743 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
744 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
745 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
746 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1
747 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2
748 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3
749 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4
750 * @arg @ref LL_DMAMUX_REQ_TIM5_UP
751 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG
752 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
753 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
754 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
755 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
756 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
757 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
758 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
759 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
760 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0
761 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1
762 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2
763 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3
764 * @arg @ref LL_DMAMUX_REQ_DCMI
765 * @arg @ref LL_DMAMUX_REQ_AES_IN
766 * @arg @ref LL_DMAMUX_REQ_AES_OUT
767 * @arg @ref LL_DMAMUX_REQ_HASH_IN
768 */
LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)769 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
770 {
771 (void)(DMAMUXx);
772 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID));
773 }
774
775 /**
776 * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
777 * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb
778 * @param DMAMUXx DMAMUXx Instance
779 * @param Channel This parameter can be one of the following values:
780 * @arg @ref LL_DMAMUX_CHANNEL_0
781 * @arg @ref LL_DMAMUX_CHANNEL_1
782 * @arg @ref LL_DMAMUX_CHANNEL_2
783 * @arg @ref LL_DMAMUX_CHANNEL_3
784 * @arg @ref LL_DMAMUX_CHANNEL_4
785 * @arg @ref LL_DMAMUX_CHANNEL_5
786 * @arg @ref LL_DMAMUX_CHANNEL_6
787 * @arg @ref LL_DMAMUX_CHANNEL_7
788 * @arg @ref LL_DMAMUX_CHANNEL_8
789 * @arg @ref LL_DMAMUX_CHANNEL_9
790 * @arg @ref LL_DMAMUX_CHANNEL_10
791 * @arg @ref LL_DMAMUX_CHANNEL_11
792 * @arg @ref LL_DMAMUX_CHANNEL_12
793 * @arg @ref LL_DMAMUX_CHANNEL_13
794 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
795 * @retval None
796 */
LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t RequestNb)797 __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
798 {
799 (void)(DMAMUXx);
800 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos));
801 }
802
803 /**
804 * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
805 * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb
806 * @param DMAMUXx DMAMUXx Instance
807 * @param Channel This parameter can be one of the following values:
808 * @arg @ref LL_DMAMUX_CHANNEL_0
809 * @arg @ref LL_DMAMUX_CHANNEL_1
810 * @arg @ref LL_DMAMUX_CHANNEL_2
811 * @arg @ref LL_DMAMUX_CHANNEL_3
812 * @arg @ref LL_DMAMUX_CHANNEL_4
813 * @arg @ref LL_DMAMUX_CHANNEL_5
814 * @arg @ref LL_DMAMUX_CHANNEL_6
815 * @arg @ref LL_DMAMUX_CHANNEL_7
816 * @arg @ref LL_DMAMUX_CHANNEL_8
817 * @arg @ref LL_DMAMUX_CHANNEL_9
818 * @arg @ref LL_DMAMUX_CHANNEL_10
819 * @arg @ref LL_DMAMUX_CHANNEL_11
820 * @arg @ref LL_DMAMUX_CHANNEL_12
821 * @arg @ref LL_DMAMUX_CHANNEL_13
822 * @retval Between Min_Data = 1 and Max_Data = 32
823 */
LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)824 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
825 {
826 (void)(DMAMUXx);
827 return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U);
828 }
829
830 /**
831 * @brief Set the polarity of the signal on which the DMA request is synchronized.
832 * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity
833 * @param DMAMUXx DMAMUXx Instance
834 * @param Channel This parameter can be one of the following values:
835 * @arg @ref LL_DMAMUX_CHANNEL_0
836 * @arg @ref LL_DMAMUX_CHANNEL_1
837 * @arg @ref LL_DMAMUX_CHANNEL_2
838 * @arg @ref LL_DMAMUX_CHANNEL_3
839 * @arg @ref LL_DMAMUX_CHANNEL_4
840 * @arg @ref LL_DMAMUX_CHANNEL_5
841 * @arg @ref LL_DMAMUX_CHANNEL_6
842 * @arg @ref LL_DMAMUX_CHANNEL_7
843 * @arg @ref LL_DMAMUX_CHANNEL_8
844 * @arg @ref LL_DMAMUX_CHANNEL_9
845 * @arg @ref LL_DMAMUX_CHANNEL_10
846 * @arg @ref LL_DMAMUX_CHANNEL_11
847 * @arg @ref LL_DMAMUX_CHANNEL_12
848 * @arg @ref LL_DMAMUX_CHANNEL_13
849 * @param Polarity This parameter can be one of the following values:
850 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
851 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
852 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
853 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
854 * @retval None
855 */
LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Polarity)856 __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
857 {
858 (void)(DMAMUXx);
859 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity);
860 }
861
862 /**
863 * @brief Get the polarity of the signal on which the DMA request is synchronized.
864 * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity
865 * @param DMAMUXx DMAMUXx Instance
866 * @param Channel This parameter can be one of the following values:
867 * @arg @ref LL_DMAMUX_CHANNEL_0
868 * @arg @ref LL_DMAMUX_CHANNEL_1
869 * @arg @ref LL_DMAMUX_CHANNEL_2
870 * @arg @ref LL_DMAMUX_CHANNEL_3
871 * @arg @ref LL_DMAMUX_CHANNEL_4
872 * @arg @ref LL_DMAMUX_CHANNEL_5
873 * @arg @ref LL_DMAMUX_CHANNEL_6
874 * @arg @ref LL_DMAMUX_CHANNEL_7
875 * @arg @ref LL_DMAMUX_CHANNEL_8
876 * @arg @ref LL_DMAMUX_CHANNEL_9
877 * @arg @ref LL_DMAMUX_CHANNEL_10
878 * @arg @ref LL_DMAMUX_CHANNEL_11
879 * @arg @ref LL_DMAMUX_CHANNEL_12
880 * @arg @ref LL_DMAMUX_CHANNEL_13
881 * @retval Returned value can be one of the following values:
882 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
883 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
884 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
885 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
886 */
LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)887 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
888 {
889 (void)(DMAMUXx);
890 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL));
891 }
892
893 /**
894 * @brief Enable the Event Generation on DMAMUX channel x.
895 * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration
896 * @param DMAMUXx DMAMUXx Instance
897 * @param Channel This parameter can be one of the following values:
898 * @arg @ref LL_DMAMUX_CHANNEL_0
899 * @arg @ref LL_DMAMUX_CHANNEL_1
900 * @arg @ref LL_DMAMUX_CHANNEL_2
901 * @arg @ref LL_DMAMUX_CHANNEL_3
902 * @arg @ref LL_DMAMUX_CHANNEL_4
903 * @arg @ref LL_DMAMUX_CHANNEL_5
904 * @arg @ref LL_DMAMUX_CHANNEL_6
905 * @arg @ref LL_DMAMUX_CHANNEL_7
906 * @arg @ref LL_DMAMUX_CHANNEL_8
907 * @arg @ref LL_DMAMUX_CHANNEL_9
908 * @arg @ref LL_DMAMUX_CHANNEL_10
909 * @arg @ref LL_DMAMUX_CHANNEL_11
910 * @arg @ref LL_DMAMUX_CHANNEL_12
911 * @arg @ref LL_DMAMUX_CHANNEL_13
912 * @retval None
913 */
LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)914 __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
915 {
916 (void)(DMAMUXx);
917 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
918 }
919
920 /**
921 * @brief Disable the Event Generation on DMAMUX channel x.
922 * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration
923 * @param DMAMUXx DMAMUXx Instance
924 * @param Channel This parameter can be one of the following values:
925 * @arg @ref LL_DMAMUX_CHANNEL_0
926 * @arg @ref LL_DMAMUX_CHANNEL_1
927 * @arg @ref LL_DMAMUX_CHANNEL_2
928 * @arg @ref LL_DMAMUX_CHANNEL_3
929 * @arg @ref LL_DMAMUX_CHANNEL_4
930 * @arg @ref LL_DMAMUX_CHANNEL_5
931 * @arg @ref LL_DMAMUX_CHANNEL_6
932 * @arg @ref LL_DMAMUX_CHANNEL_7
933 * @arg @ref LL_DMAMUX_CHANNEL_8
934 * @arg @ref LL_DMAMUX_CHANNEL_9
935 * @arg @ref LL_DMAMUX_CHANNEL_10
936 * @arg @ref LL_DMAMUX_CHANNEL_11
937 * @arg @ref LL_DMAMUX_CHANNEL_12
938 * @arg @ref LL_DMAMUX_CHANNEL_13
939 * @retval None
940 */
LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)941 __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
942 {
943 (void)(DMAMUXx);
944 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
945 }
946
947 /**
948 * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled.
949 * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration
950 * @param DMAMUXx DMAMUXx Instance
951 * @param Channel This parameter can be one of the following values:
952 * @arg @ref LL_DMAMUX_CHANNEL_0
953 * @arg @ref LL_DMAMUX_CHANNEL_1
954 * @arg @ref LL_DMAMUX_CHANNEL_2
955 * @arg @ref LL_DMAMUX_CHANNEL_3
956 * @arg @ref LL_DMAMUX_CHANNEL_4
957 * @arg @ref LL_DMAMUX_CHANNEL_5
958 * @arg @ref LL_DMAMUX_CHANNEL_6
959 * @arg @ref LL_DMAMUX_CHANNEL_7
960 * @arg @ref LL_DMAMUX_CHANNEL_8
961 * @arg @ref LL_DMAMUX_CHANNEL_9
962 * @arg @ref LL_DMAMUX_CHANNEL_10
963 * @arg @ref LL_DMAMUX_CHANNEL_11
964 * @arg @ref LL_DMAMUX_CHANNEL_12
965 * @arg @ref LL_DMAMUX_CHANNEL_13
966 * @retval State of bit (1 or 0).
967 */
LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)968 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
969 {
970 (void)(DMAMUXx);
971 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE))? 1UL : 0UL);
972 }
973
974 /**
975 * @brief Enable the synchronization mode.
976 * @rmtoll CxCR SE LL_DMAMUX_EnableSync
977 * @param DMAMUXx DMAMUXx Instance
978 * @param Channel This parameter can be one of the following values:
979 * @arg @ref LL_DMAMUX_CHANNEL_0
980 * @arg @ref LL_DMAMUX_CHANNEL_1
981 * @arg @ref LL_DMAMUX_CHANNEL_2
982 * @arg @ref LL_DMAMUX_CHANNEL_3
983 * @arg @ref LL_DMAMUX_CHANNEL_4
984 * @arg @ref LL_DMAMUX_CHANNEL_5
985 * @arg @ref LL_DMAMUX_CHANNEL_6
986 * @arg @ref LL_DMAMUX_CHANNEL_7
987 * @arg @ref LL_DMAMUX_CHANNEL_8
988 * @arg @ref LL_DMAMUX_CHANNEL_9
989 * @arg @ref LL_DMAMUX_CHANNEL_10
990 * @arg @ref LL_DMAMUX_CHANNEL_11
991 * @arg @ref LL_DMAMUX_CHANNEL_12
992 * @arg @ref LL_DMAMUX_CHANNEL_13
993 * @retval None
994 */
LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)995 __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
996 {
997 (void)(DMAMUXx);
998 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
999 }
1000
1001 /**
1002 * @brief Disable the synchronization mode.
1003 * @rmtoll CxCR SE LL_DMAMUX_DisableSync
1004 * @param DMAMUXx DMAMUXx Instance
1005 * @param Channel This parameter can be one of the following values:
1006 * @arg @ref LL_DMAMUX_CHANNEL_0
1007 * @arg @ref LL_DMAMUX_CHANNEL_1
1008 * @arg @ref LL_DMAMUX_CHANNEL_2
1009 * @arg @ref LL_DMAMUX_CHANNEL_3
1010 * @arg @ref LL_DMAMUX_CHANNEL_4
1011 * @arg @ref LL_DMAMUX_CHANNEL_5
1012 * @arg @ref LL_DMAMUX_CHANNEL_6
1013 * @arg @ref LL_DMAMUX_CHANNEL_7
1014 * @arg @ref LL_DMAMUX_CHANNEL_8
1015 * @arg @ref LL_DMAMUX_CHANNEL_9
1016 * @arg @ref LL_DMAMUX_CHANNEL_10
1017 * @arg @ref LL_DMAMUX_CHANNEL_11
1018 * @arg @ref LL_DMAMUX_CHANNEL_12
1019 * @arg @ref LL_DMAMUX_CHANNEL_13
1020 * @retval None
1021 */
LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1022 __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1023 {
1024 (void)(DMAMUXx);
1025 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
1026 }
1027
1028 /**
1029 * @brief Check if the synchronization mode is enabled or disabled.
1030 * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync
1031 * @param DMAMUXx DMAMUXx Instance
1032 * @param Channel This parameter can be one of the following values:
1033 * @arg @ref LL_DMAMUX_CHANNEL_0
1034 * @arg @ref LL_DMAMUX_CHANNEL_1
1035 * @arg @ref LL_DMAMUX_CHANNEL_2
1036 * @arg @ref LL_DMAMUX_CHANNEL_3
1037 * @arg @ref LL_DMAMUX_CHANNEL_4
1038 * @arg @ref LL_DMAMUX_CHANNEL_5
1039 * @arg @ref LL_DMAMUX_CHANNEL_6
1040 * @arg @ref LL_DMAMUX_CHANNEL_7
1041 * @arg @ref LL_DMAMUX_CHANNEL_8
1042 * @arg @ref LL_DMAMUX_CHANNEL_9
1043 * @arg @ref LL_DMAMUX_CHANNEL_10
1044 * @arg @ref LL_DMAMUX_CHANNEL_11
1045 * @arg @ref LL_DMAMUX_CHANNEL_12
1046 * @arg @ref LL_DMAMUX_CHANNEL_13
1047 * @retval State of bit (1 or 0).
1048 */
LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1049 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1050 {
1051 (void)(DMAMUXx);
1052 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE))? 1UL : 0UL);
1053 }
1054
1055 /**
1056 * @brief Set DMAMUX synchronization ID on DMAMUX Channel x.
1057 * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID
1058 * @param DMAMUXx DMAMUXx Instance
1059 * @param Channel This parameter can be one of the following values:
1060 * @arg @ref LL_DMAMUX_CHANNEL_0
1061 * @arg @ref LL_DMAMUX_CHANNEL_1
1062 * @arg @ref LL_DMAMUX_CHANNEL_2
1063 * @arg @ref LL_DMAMUX_CHANNEL_3
1064 * @arg @ref LL_DMAMUX_CHANNEL_4
1065 * @arg @ref LL_DMAMUX_CHANNEL_5
1066 * @arg @ref LL_DMAMUX_CHANNEL_6
1067 * @arg @ref LL_DMAMUX_CHANNEL_7
1068 * @arg @ref LL_DMAMUX_CHANNEL_8
1069 * @arg @ref LL_DMAMUX_CHANNEL_9
1070 * @arg @ref LL_DMAMUX_CHANNEL_10
1071 * @arg @ref LL_DMAMUX_CHANNEL_11
1072 * @arg @ref LL_DMAMUX_CHANNEL_12
1073 * @arg @ref LL_DMAMUX_CHANNEL_13
1074 * @param SyncID This parameter can be one of the following values:
1075 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1076 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1077 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1078 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1079 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1080 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1081 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1082 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1083 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1084 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1085 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1086 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1087 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1088 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1089 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1090 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1091 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1092 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1093 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1094 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1095 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1096 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
1097 * @arg @ref LL_DMAMUX_SYNC_DSI_TE
1098 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END
1099 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END
1100 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT
1101 * @retval None
1102 */
LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t SyncID)1103 __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
1104 {
1105 (void)(DMAMUXx);
1106 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID);
1107 }
1108
1109 /**
1110 * @brief Get DMAMUX synchronization ID on DMAMUX Channel x.
1111 * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID
1112 * @param DMAMUXx DMAMUXx Instance
1113 * @param Channel This parameter can be one of the following values:
1114 * @arg @ref LL_DMAMUX_CHANNEL_0
1115 * @arg @ref LL_DMAMUX_CHANNEL_1
1116 * @arg @ref LL_DMAMUX_CHANNEL_2
1117 * @arg @ref LL_DMAMUX_CHANNEL_3
1118 * @arg @ref LL_DMAMUX_CHANNEL_4
1119 * @arg @ref LL_DMAMUX_CHANNEL_5
1120 * @arg @ref LL_DMAMUX_CHANNEL_6
1121 * @arg @ref LL_DMAMUX_CHANNEL_7
1122 * @arg @ref LL_DMAMUX_CHANNEL_8
1123 * @arg @ref LL_DMAMUX_CHANNEL_9
1124 * @arg @ref LL_DMAMUX_CHANNEL_10
1125 * @arg @ref LL_DMAMUX_CHANNEL_11
1126 * @arg @ref LL_DMAMUX_CHANNEL_12
1127 * @arg @ref LL_DMAMUX_CHANNEL_13
1128 * @retval Returned value can be one of the following values:
1129 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1130 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1131 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1132 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1133 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1134 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1135 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1136 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1137 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1138 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1139 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1140 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1141 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1142 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1143 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1144 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1145 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1146 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1147 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1148 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1149 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1150 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
1151 * @arg @ref LL_DMAMUX_SYNC_DSI_TE
1152 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END
1153 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END
1154 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT
1155 */
LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1156 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1157 {
1158 (void)(DMAMUXx);
1159 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID));
1160 }
1161
1162 /**
1163 * @brief Enable the Request Generator.
1164 * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen
1165 * @param DMAMUXx DMAMUXx Instance
1166 * @param RequestGenChannel This parameter can be one of the following values:
1167 * @arg @ref LL_DMAMUX_REQ_GEN_0
1168 * @arg @ref LL_DMAMUX_REQ_GEN_1
1169 * @arg @ref LL_DMAMUX_REQ_GEN_2
1170 * @arg @ref LL_DMAMUX_REQ_GEN_3
1171 * @retval None
1172 */
LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1173 __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1174 {
1175 (void)(DMAMUXx);
1176 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1177 }
1178
1179 /**
1180 * @brief Disable the Request Generator.
1181 * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen
1182 * @param DMAMUXx DMAMUXx Instance
1183 * @param RequestGenChannel This parameter can be one of the following values:
1184 * @arg @ref LL_DMAMUX_REQ_GEN_0
1185 * @arg @ref LL_DMAMUX_REQ_GEN_1
1186 * @arg @ref LL_DMAMUX_REQ_GEN_2
1187 * @arg @ref LL_DMAMUX_REQ_GEN_3
1188 * @retval None
1189 */
LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1190 __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1191 {
1192 (void)(DMAMUXx);
1193 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1194 }
1195
1196 /**
1197 * @brief Check if the Request Generator is enabled or disabled.
1198 * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen
1199 * @param DMAMUXx DMAMUXx Instance
1200 * @param RequestGenChannel This parameter can be one of the following values:
1201 * @arg @ref LL_DMAMUX_REQ_GEN_0
1202 * @arg @ref LL_DMAMUX_REQ_GEN_1
1203 * @arg @ref LL_DMAMUX_REQ_GEN_2
1204 * @arg @ref LL_DMAMUX_REQ_GEN_3
1205 * @retval State of bit (1 or 0).
1206 */
LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1207 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1208 {
1209 (void)(DMAMUXx);
1210 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE))? 1UL : 0UL);
1211 }
1212
1213 /**
1214 * @brief Set the polarity of the signal on which the DMA request is generated.
1215 * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity
1216 * @param DMAMUXx DMAMUXx Instance
1217 * @param RequestGenChannel This parameter can be one of the following values:
1218 * @arg @ref LL_DMAMUX_REQ_GEN_0
1219 * @arg @ref LL_DMAMUX_REQ_GEN_1
1220 * @arg @ref LL_DMAMUX_REQ_GEN_2
1221 * @arg @ref LL_DMAMUX_REQ_GEN_3
1222 * @param Polarity This parameter can be one of the following values:
1223 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1224 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1225 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1226 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1227 * @retval None
1228 */
LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t Polarity)1229 __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t Polarity)
1230 {
1231 (void)(DMAMUXx);
1232 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity);
1233 }
1234
1235 /**
1236 * @brief Get the polarity of the signal on which the DMA request is generated.
1237 * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity
1238 * @param DMAMUXx DMAMUXx Instance
1239 * @param RequestGenChannel This parameter can be one of the following values:
1240 * @arg @ref LL_DMAMUX_REQ_GEN_0
1241 * @arg @ref LL_DMAMUX_REQ_GEN_1
1242 * @arg @ref LL_DMAMUX_REQ_GEN_2
1243 * @arg @ref LL_DMAMUX_REQ_GEN_3
1244 * @retval Returned value can be one of the following values:
1245 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1246 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1247 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1248 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1249 */
LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1250 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1251 {
1252 (void)(DMAMUXx);
1253 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL));
1254 }
1255
1256 /**
1257 * @brief Set the number of DMA request that will be autorized after a generation event.
1258 * @note This field can only be written when Generator is disabled.
1259 * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb
1260 * @param DMAMUXx DMAMUXx Instance
1261 * @param RequestGenChannel This parameter can be one of the following values:
1262 * @arg @ref LL_DMAMUX_REQ_GEN_0
1263 * @arg @ref LL_DMAMUX_REQ_GEN_1
1264 * @arg @ref LL_DMAMUX_REQ_GEN_2
1265 * @arg @ref LL_DMAMUX_REQ_GEN_3
1266 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
1267 * @retval None
1268 */
LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestNb)1269 __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestNb)
1270 {
1271 (void)(DMAMUXx);
1272 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos);
1273 }
1274
1275 /**
1276 * @brief Get the number of DMA request that will be autorized after a generation event.
1277 * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb
1278 * @param DMAMUXx DMAMUXx Instance
1279 * @param RequestGenChannel This parameter can be one of the following values:
1280 * @arg @ref LL_DMAMUX_REQ_GEN_0
1281 * @arg @ref LL_DMAMUX_REQ_GEN_1
1282 * @arg @ref LL_DMAMUX_REQ_GEN_2
1283 * @arg @ref LL_DMAMUX_REQ_GEN_3
1284 * @retval Between Min_Data = 1 and Max_Data = 32
1285 */
LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1286 __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1287 {
1288 (void)(DMAMUXx);
1289 return (uint32_t)((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U);
1290 }
1291
1292 /**
1293 * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x.
1294 * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID
1295 * @param DMAMUXx DMAMUXx Instance
1296 * @param RequestGenChannel This parameter can be one of the following values:
1297 * @arg @ref LL_DMAMUX_REQ_GEN_0
1298 * @arg @ref LL_DMAMUX_REQ_GEN_1
1299 * @arg @ref LL_DMAMUX_REQ_GEN_2
1300 * @arg @ref LL_DMAMUX_REQ_GEN_3
1301 * @param RequestSignalID This parameter can be one of the following values:
1302 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1303 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1304 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1305 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1306 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1307 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1308 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1309 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1310 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1311 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1312 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1313 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1314 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1315 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1316 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1317 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1318 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1319 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1320 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1321 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1322 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1323 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1324 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE
1325 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END
1326 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END
1327 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT
1328 * @retval None
1329 */
LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestSignalID)1330 __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestSignalID)
1331 {
1332 (void)(DMAMUXx);
1333 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID);
1334 }
1335
1336 /**
1337 * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x.
1338 * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID
1339 * @param DMAMUXx DMAMUXx Instance
1340 * @param RequestGenChannel This parameter can be one of the following values:
1341 * @arg @ref LL_DMAMUX_REQ_GEN_0
1342 * @arg @ref LL_DMAMUX_REQ_GEN_1
1343 * @arg @ref LL_DMAMUX_REQ_GEN_2
1344 * @arg @ref LL_DMAMUX_REQ_GEN_3
1345 * @retval Returned value can be one of the following values:
1346 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1347 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1348 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1349 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1350 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1351 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1352 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1353 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1354 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1355 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1356 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1357 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1358 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1359 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1360 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1361 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1362 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1363 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1364 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1365 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1366 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1367 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1368 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE
1369 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END
1370 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END
1371 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT
1372 */
LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1373 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1374 {
1375 (void)(DMAMUXx);
1376 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID));
1377 }
1378
1379 /**
1380 * @}
1381 */
1382
1383 /** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management
1384 * @{
1385 */
1386
1387 /**
1388 * @brief Get Synchronization Event Overrun Flag Channel 0.
1389 * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0
1390 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1391 * @retval State of bit (1 or 0).
1392 */
LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1393 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1394 {
1395 (void)(DMAMUXx);
1396 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL);
1397 }
1398
1399 /**
1400 * @brief Get Synchronization Event Overrun Flag Channel 1.
1401 * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1
1402 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1403 * @retval State of bit (1 or 0).
1404 */
LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1405 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1406 {
1407 (void)(DMAMUXx);
1408 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);
1409 }
1410
1411 /**
1412 * @brief Get Synchronization Event Overrun Flag Channel 2.
1413 * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2
1414 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1415 * @retval State of bit (1 or 0).
1416 */
LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1417 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1418 {
1419 (void)(DMAMUXx);
1420 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);
1421 }
1422
1423 /**
1424 * @brief Get Synchronization Event Overrun Flag Channel 3.
1425 * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3
1426 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1427 * @retval State of bit (1 or 0).
1428 */
LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1429 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1430 {
1431 (void)(DMAMUXx);
1432 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);
1433 }
1434
1435 /**
1436 * @brief Get Synchronization Event Overrun Flag Channel 4.
1437 * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4
1438 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1439 * @retval State of bit (1 or 0).
1440 */
LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1441 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1442 {
1443 (void)(DMAMUXx);
1444 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);
1445 }
1446
1447 /**
1448 * @brief Get Synchronization Event Overrun Flag Channel 5.
1449 * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5
1450 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1451 * @retval State of bit (1 or 0).
1452 */
LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1453 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1454 {
1455 (void)(DMAMUXx);
1456 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);
1457 }
1458
1459 /**
1460 * @brief Get Synchronization Event Overrun Flag Channel 6.
1461 * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6
1462 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1463 * @retval State of bit (1 or 0).
1464 */
LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1465 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1466 {
1467 (void)(DMAMUXx);
1468 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL);
1469 }
1470
1471 /**
1472 * @brief Get Synchronization Event Overrun Flag Channel 7.
1473 * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7
1474 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1475 * @retval State of bit (1 or 0).
1476 */
LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1477 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1478 {
1479 (void)(DMAMUXx);
1480 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL);
1481 }
1482
1483 /**
1484 * @brief Get Synchronization Event Overrun Flag Channel 8.
1485 * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8
1486 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1487 * @retval State of bit (1 or 0).
1488 */
LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1489 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1490 {
1491 (void)(DMAMUXx);
1492 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL);
1493 }
1494
1495 /**
1496 * @brief Get Synchronization Event Overrun Flag Channel 9.
1497 * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9
1498 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1499 * @retval State of bit (1 or 0).
1500 */
LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1501 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1502 {
1503 (void)(DMAMUXx);
1504 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL);
1505 }
1506
1507 /**
1508 * @brief Get Synchronization Event Overrun Flag Channel 10.
1509 * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10
1510 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1511 * @retval State of bit (1 or 0).
1512 */
LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1513 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1514 {
1515 (void)(DMAMUXx);
1516 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL);
1517 }
1518
1519 /**
1520 * @brief Get Synchronization Event Overrun Flag Channel 11.
1521 * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11
1522 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1523 * @retval State of bit (1 or 0).
1524 */
LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1525 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1526 {
1527 (void)(DMAMUXx);
1528 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL);
1529 }
1530
1531 /**
1532 * @brief Get Synchronization Event Overrun Flag Channel 12.
1533 * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12
1534 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1535 * @retval State of bit (1 or 0).
1536 */
LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1537 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1538 {
1539 (void)(DMAMUXx);
1540 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL);
1541 }
1542
1543 /**
1544 * @brief Get Synchronization Event Overrun Flag Channel 13.
1545 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13
1546 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1547 * @retval State of bit (1 or 0).
1548 */
LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1549 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1550 {
1551 (void)(DMAMUXx);
1552 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL);
1553 }
1554
1555 /**
1556 * @brief Get Request Generator 0 Trigger Event Overrun Flag.
1557 * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0
1558 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1559 * @retval State of bit (1 or 0).
1560 */
LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1561 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1562 {
1563 (void)(DMAMUXx);
1564 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL);
1565 }
1566
1567 /**
1568 * @brief Get Request Generator 1 Trigger Event Overrun Flag.
1569 * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1
1570 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1571 * @retval State of bit (1 or 0).
1572 */
LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1573 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1574 {
1575 (void)(DMAMUXx);
1576 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL);
1577 }
1578
1579 /**
1580 * @brief Get Request Generator 2 Trigger Event Overrun Flag.
1581 * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2
1582 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1583 * @retval State of bit (1 or 0).
1584 */
LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1585 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1586 {
1587 (void)(DMAMUXx);
1588 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL);
1589 }
1590
1591 /**
1592 * @brief Get Request Generator 3 Trigger Event Overrun Flag.
1593 * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3
1594 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1595 * @retval State of bit (1 or 0).
1596 */
LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1597 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1598 {
1599 (void)(DMAMUXx);
1600 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL);
1601 }
1602
1603 /**
1604 * @brief Clear Synchronization Event Overrun Flag Channel 0.
1605 * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0
1606 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1607 * @retval None
1608 */
LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1609 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)
1610 {
1611 (void)(DMAMUXx);
1612 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0);
1613 }
1614
1615 /**
1616 * @brief Clear Synchronization Event Overrun Flag Channel 1.
1617 * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1
1618 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1619 * @retval None
1620 */
LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1621 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1622 {
1623 (void)(DMAMUXx);
1624 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1);
1625 }
1626
1627 /**
1628 * @brief Clear Synchronization Event Overrun Flag Channel 2.
1629 * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2
1630 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1631 * @retval None
1632 */
LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1633 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1634 {
1635 (void)(DMAMUXx);
1636 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2);
1637 }
1638
1639 /**
1640 * @brief Clear Synchronization Event Overrun Flag Channel 3.
1641 * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3
1642 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1643 * @retval None
1644 */
LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1645 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1646 {
1647 (void)(DMAMUXx);
1648 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3);
1649 }
1650
1651 /**
1652 * @brief Clear Synchronization Event Overrun Flag Channel 4.
1653 * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4
1654 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1655 * @retval None
1656 */
LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1657 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1658 {
1659 (void)(DMAMUXx);
1660 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4);
1661 }
1662
1663 /**
1664 * @brief Clear Synchronization Event Overrun Flag Channel 5.
1665 * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5
1666 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1667 * @retval None
1668 */
LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1669 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1670 {
1671 (void)(DMAMUXx);
1672 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5);
1673 }
1674
1675 /**
1676 * @brief Clear Synchronization Event Overrun Flag Channel 6.
1677 * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6
1678 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1679 * @retval None
1680 */
LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1681 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1682 {
1683 (void)(DMAMUXx);
1684 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6);
1685 }
1686
1687 /**
1688 * @brief Clear Synchronization Event Overrun Flag Channel 7.
1689 * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7
1690 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1691 * @retval None
1692 */
LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1693 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1694 {
1695 (void)(DMAMUXx);
1696 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7);
1697 }
1698
1699 /**
1700 * @brief Clear Synchronization Event Overrun Flag Channel 8.
1701 * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8
1702 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1703 * @retval None
1704 */
LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1705 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1706 {
1707 (void)(DMAMUXx);
1708 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8);
1709 }
1710
1711 /**
1712 * @brief Clear Synchronization Event Overrun Flag Channel 9.
1713 * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9
1714 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1715 * @retval None
1716 */
LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1717 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1718 {
1719 (void)(DMAMUXx);
1720 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9);
1721 }
1722
1723 /**
1724 * @brief Clear Synchronization Event Overrun Flag Channel 10.
1725 * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10
1726 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1727 * @retval None
1728 */
LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1729 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1730 {
1731 (void)(DMAMUXx);
1732 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10);
1733 }
1734
1735 /**
1736 * @brief Clear Synchronization Event Overrun Flag Channel 11.
1737 * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11
1738 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1739 * @retval None
1740 */
LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1741 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1742 {
1743 (void)(DMAMUXx);
1744 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11);
1745 }
1746
1747 /**
1748 * @brief Clear Synchronization Event Overrun Flag Channel 12.
1749 * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12
1750 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1751 * @retval None
1752 */
LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1753 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1754 {
1755 (void)(DMAMUXx);
1756 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12);
1757 }
1758
1759 /**
1760 * @brief Clear Synchronization Event Overrun Flag Channel 13.
1761 * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13
1762 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1763 * @retval None
1764 */
LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1765 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1766 {
1767 (void)(DMAMUXx);
1768 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13);
1769 }
1770
1771 /**
1772 * @brief Clear Request Generator 0 Trigger Event Overrun Flag.
1773 * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0
1774 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1775 * @retval None
1776 */
LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1777 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1778 {
1779 (void)(DMAMUXx);
1780 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0);
1781 }
1782
1783 /**
1784 * @brief Clear Request Generator 1 Trigger Event Overrun Flag.
1785 * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1
1786 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1787 * @retval None
1788 */
LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1789 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1790 {
1791 (void)(DMAMUXx);
1792 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1);
1793 }
1794
1795 /**
1796 * @brief Clear Request Generator 2 Trigger Event Overrun Flag.
1797 * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2
1798 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1799 * @retval None
1800 */
LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1801 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1802 {
1803 (void)(DMAMUXx);
1804 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2);
1805 }
1806
1807 /**
1808 * @brief Clear Request Generator 3 Trigger Event Overrun Flag.
1809 * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3
1810 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1811 * @retval None
1812 */
LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1813 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1814 {
1815 (void)(DMAMUXx);
1816 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3);
1817 }
1818
1819 /**
1820 * @}
1821 */
1822
1823 /** @defgroup DMAMUX_LL_EF_IT_Management IT_Management
1824 * @{
1825 */
1826
1827 /**
1828 * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1829 * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO
1830 * @param DMAMUXx DMAMUXx Instance
1831 * @param Channel This parameter can be one of the following values:
1832 * @arg @ref LL_DMAMUX_CHANNEL_0
1833 * @arg @ref LL_DMAMUX_CHANNEL_1
1834 * @arg @ref LL_DMAMUX_CHANNEL_2
1835 * @arg @ref LL_DMAMUX_CHANNEL_3
1836 * @arg @ref LL_DMAMUX_CHANNEL_4
1837 * @arg @ref LL_DMAMUX_CHANNEL_5
1838 * @arg @ref LL_DMAMUX_CHANNEL_6
1839 * @arg @ref LL_DMAMUX_CHANNEL_7
1840 * @arg @ref LL_DMAMUX_CHANNEL_8
1841 * @arg @ref LL_DMAMUX_CHANNEL_9
1842 * @arg @ref LL_DMAMUX_CHANNEL_10
1843 * @arg @ref LL_DMAMUX_CHANNEL_11
1844 * @arg @ref LL_DMAMUX_CHANNEL_12
1845 * @arg @ref LL_DMAMUX_CHANNEL_13
1846 * @retval None
1847 */
LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1848 __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1849 {
1850 (void)(DMAMUXx);
1851 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1852 }
1853
1854 /**
1855 * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1856 * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO
1857 * @param DMAMUXx DMAMUXx Instance
1858 * @param Channel This parameter can be one of the following values:
1859 * @arg @ref LL_DMAMUX_CHANNEL_0
1860 * @arg @ref LL_DMAMUX_CHANNEL_1
1861 * @arg @ref LL_DMAMUX_CHANNEL_2
1862 * @arg @ref LL_DMAMUX_CHANNEL_3
1863 * @arg @ref LL_DMAMUX_CHANNEL_4
1864 * @arg @ref LL_DMAMUX_CHANNEL_5
1865 * @arg @ref LL_DMAMUX_CHANNEL_6
1866 * @arg @ref LL_DMAMUX_CHANNEL_7
1867 * @arg @ref LL_DMAMUX_CHANNEL_8
1868 * @arg @ref LL_DMAMUX_CHANNEL_9
1869 * @arg @ref LL_DMAMUX_CHANNEL_10
1870 * @arg @ref LL_DMAMUX_CHANNEL_11
1871 * @arg @ref LL_DMAMUX_CHANNEL_12
1872 * @arg @ref LL_DMAMUX_CHANNEL_13
1873 * @retval None
1874 */
LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1875 __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1876 {
1877 (void)(DMAMUXx);
1878 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1879 }
1880
1881 /**
1882 * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1883 * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO
1884 * @param DMAMUXx DMAMUXx Instance
1885 * @param Channel This parameter can be one of the following values:
1886 * @arg @ref LL_DMAMUX_CHANNEL_0
1887 * @arg @ref LL_DMAMUX_CHANNEL_1
1888 * @arg @ref LL_DMAMUX_CHANNEL_2
1889 * @arg @ref LL_DMAMUX_CHANNEL_3
1890 * @arg @ref LL_DMAMUX_CHANNEL_4
1891 * @arg @ref LL_DMAMUX_CHANNEL_5
1892 * @arg @ref LL_DMAMUX_CHANNEL_6
1893 * @arg @ref LL_DMAMUX_CHANNEL_7
1894 * @arg @ref LL_DMAMUX_CHANNEL_8
1895 * @arg @ref LL_DMAMUX_CHANNEL_9
1896 * @arg @ref LL_DMAMUX_CHANNEL_10
1897 * @arg @ref LL_DMAMUX_CHANNEL_11
1898 * @arg @ref LL_DMAMUX_CHANNEL_12
1899 * @arg @ref LL_DMAMUX_CHANNEL_13
1900 * @retval State of bit (1 or 0).
1901 */
LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1902 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1903 {
1904 (void)(DMAMUXx);
1905 return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE))? 1UL : 0UL);
1906 }
1907
1908 /**
1909 * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1910 * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO
1911 * @param DMAMUXx DMAMUXx Instance
1912 * @param RequestGenChannel This parameter can be one of the following values:
1913 * @arg @ref LL_DMAMUX_REQ_GEN_0
1914 * @arg @ref LL_DMAMUX_REQ_GEN_1
1915 * @arg @ref LL_DMAMUX_REQ_GEN_2
1916 * @arg @ref LL_DMAMUX_REQ_GEN_3
1917 * @retval None
1918 */
LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1919 __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1920 {
1921 (void)(DMAMUXx);
1922 SET_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1923 }
1924
1925 /**
1926 * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1927 * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO
1928 * @param DMAMUXx DMAMUXx Instance
1929 * @param RequestGenChannel This parameter can be one of the following values:
1930 * @arg @ref LL_DMAMUX_REQ_GEN_0
1931 * @arg @ref LL_DMAMUX_REQ_GEN_1
1932 * @arg @ref LL_DMAMUX_REQ_GEN_2
1933 * @arg @ref LL_DMAMUX_REQ_GEN_3
1934 * @retval None
1935 */
LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1936 __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1937 {
1938 (void)(DMAMUXx);
1939 CLEAR_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1940 }
1941
1942 /**
1943 * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1944 * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO
1945 * @param DMAMUXx DMAMUXx Instance
1946 * @param RequestGenChannel This parameter can be one of the following values:
1947 * @arg @ref LL_DMAMUX_REQ_GEN_0
1948 * @arg @ref LL_DMAMUX_REQ_GEN_1
1949 * @arg @ref LL_DMAMUX_REQ_GEN_2
1950 * @arg @ref LL_DMAMUX_REQ_GEN_3
1951 * @retval State of bit (1 or 0).
1952 */
LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1953 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1954 {
1955 (void)(DMAMUXx);
1956 return ((READ_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE))? 1UL : 0UL);
1957 }
1958
1959 /**
1960 * @}
1961 */
1962
1963 /**
1964 * @}
1965 */
1966
1967 /**
1968 * @}
1969 */
1970
1971 #endif /* DMAMUX1 */
1972
1973 /**
1974 * @}
1975 */
1976
1977 #ifdef __cplusplus
1978 }
1979 #endif
1980
1981 #endif /* STM32L4xx_LL_DMAMUX_H */
1982
