/hal_stm32-3.4.0/stm32cube/stm32f0xx/soc/ |
D | stm32f030x8.h | 2523 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2524 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f030x6.h | 2493 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2494 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f070x6.h | 2546 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2547 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f038xx.h | 2591 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2592 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f030xc.h | 2774 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2775 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f031x6.h | 2592 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2593 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f070xb.h | 2626 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2627 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f051x8.h | 3041 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3042 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f058xx.h | 3040 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3041 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32f071xb.h | 3413 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3414 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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/hal_stm32-3.4.0/stm32cube/stm32l0xx/soc/ |
D | stm32l010xb.h | 2574 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2575 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l010x6.h | 2564 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2565 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l010x4.h | 2558 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2559 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l010x8.h | 2566 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2567 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l011xx.h | 2639 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2640 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l021xx.h | 2767 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2768 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l031xx.h | 2705 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2706 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l041xx.h | 2833 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2834 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l051xx.h | 2746 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2747 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l081xx.h | 2920 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2921 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l071xx.h | 2792 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 2793 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l052xx.h | 3035 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3036 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32l053xx.h | 3057 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3058 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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/hal_stm32-3.4.0/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 3300 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3301 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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D | stm32c031xx.h | 3304 #define I2C_OAR2_OA2MASK02_Pos (9U) macro 3305 #define I2C_OAR2_OA2MASK02_Msk (0x1UL << I2C_OAR2_OA2MASK02_Pos) /*!< 0x00000200 */
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