Searched refs:DMA_IFCR_CHTIF5_Pos (Results 1 – 25 of 147) sorted by relevance
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2972 #define DMA_IFCR_CHTIF5_Pos (18U) macro2973 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
3034 #define DMA_IFCR_CHTIF5_Pos (18U) macro3035 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
3021 #define DMA_IFCR_CHTIF5_Pos (18U) macro3022 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
3186 #define DMA_IFCR_CHTIF5_Pos (18U) macro3187 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
3075 #define DMA_IFCR_CHTIF5_Pos (18U) macro3076 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1098 #define DMA_IFCR_CHTIF5_Pos (18U) macro1099 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1076 #define DMA_IFCR_CHTIF5_Pos (18U) macro1077 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1121 #define DMA_IFCR_CHTIF5_Pos (18U) macro1122 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1091 #define DMA_IFCR_CHTIF5_Pos (18U) macro1092 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1117 #define DMA_IFCR_CHTIF5_Pos (18U) macro1118 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1092 #define DMA_IFCR_CHTIF5_Pos (18U) macro1093 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1153 #define DMA_IFCR_CHTIF5_Pos (18U) macro1154 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1533 #define DMA_IFCR_CHTIF5_Pos (18U) macro1534 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1532 #define DMA_IFCR_CHTIF5_Pos (18U) macro1533 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1129 #define DMA_IFCR_CHTIF5_Pos (18U) macro1130 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1119 #define DMA_IFCR_CHTIF5_Pos (18U) macro1120 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1113 #define DMA_IFCR_CHTIF5_Pos (18U) macro1114 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1194 #define DMA_IFCR_CHTIF5_Pos (18U) macro1195 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1322 #define DMA_IFCR_CHTIF5_Pos (18U) macro1323 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1230 #define DMA_IFCR_CHTIF5_Pos (18U) macro1231 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1358 #define DMA_IFCR_CHTIF5_Pos (18U) macro1359 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1271 #define DMA_IFCR_CHTIF5_Pos (18U) macro1272 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1430 #define DMA_IFCR_CHTIF5_Pos (18U) macro1431 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
1302 #define DMA_IFCR_CHTIF5_Pos (18U) macro1303 #define DMA_IFCR_CHTIF5_Msk (0x1UL << DMA_IFCR_CHTIF5_Pos) /*!< 0x00040000 */
