Searched refs:DMA_CTR2_TRIGPOL_Pos (Results 1 – 12 of 12) sorted by relevance
3947 #define DMA_CTR2_TRIGPOL_Pos (24U) macro3948 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…3950 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */3951 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
5657 #define DMA_CTR2_TRIGPOL_Pos (24U) macro5658 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…5660 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */5661 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
7741 #define DMA_CTR2_TRIGPOL_Pos (24U) macro7742 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…7744 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */7745 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
8152 #define DMA_CTR2_TRIGPOL_Pos (24U) macro8153 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…8155 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */8156 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
5960 #define DMA_CTR2_TRIGPOL_Pos (24U) macro5961 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…5963 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */5964 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
6360 #define DMA_CTR2_TRIGPOL_Pos (24U) macro6361 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…6363 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */6364 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
6359 #define DMA_CTR2_TRIGPOL_Pos (24U) macro6360 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…6362 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */6363 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
6808 #define DMA_CTR2_TRIGPOL_Pos (24U) macro6809 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…6811 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */6812 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
7062 #define DMA_CTR2_TRIGPOL_Pos (24U) macro7063 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…7065 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */7066 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
6613 #define DMA_CTR2_TRIGPOL_Pos (24U) macro6614 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…6616 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */6617 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
6901 #define DMA_CTR2_TRIGPOL_Pos (24U) macro6902 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…6904 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */6905 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
7350 #define DMA_CTR2_TRIGPOL_Pos (24U) macro7351 #define DMA_CTR2_TRIGPOL_Msk (0x3UL << DMA_CTR2_TRIGPOL_Pos) /*!< 0x03000000…7353 #define DMA_CTR2_TRIGPOL_0 (0x1UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 0 */7354 #define DMA_CTR2_TRIGPOL_1 (0x2UL << DMA_CTR2_TRIGPOL_Pos) /*!< Bit 1 */
